Commit graph

77823 commits

Author SHA1 Message Date
Gabor Juhos
9089877970 MIPS: ath79: add early printk support for the QCA955X SoCs
The patch allows to see kernel messages on the
QCA955X SoCs in early boot stage.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4944/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:24 +01:00
Gabor Juhos
e3b25cead4 MIPS: ath79: fix WMAC IRQ resource assignment
The '.start' field of the IRQ resource assigned twice
in ar934x_wmac_setup(). The second assignment must
set the '.end' field. Fix it.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4954/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-19 09:36:23 +01:00
Corey Minyard
4893fc8856 mips: reserve elfcorehdr
/proc/vmcore wasn't showing up in kdump kernels.  It turns that that
for Octeon, the memory used by elfcorehdr wasn't being set aside
properly and it was getting clobbered before /proc/vmcore could get
it.  So reserve the memory if it shows up in a memory area managed
by the kernel.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
Acked-by: David Daney  <ddaney@caviumnetworks.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/4936/
2013-02-19 09:36:23 +01:00
Corey Minyard
d3ff933802 mips: Make sure kernel memory is in iomem
Kernel memory isn't necessarily added to the memory tables, so it
wouldn't show up in /proc/iomem.  This was breaking kdump, which
requires these memory addresses to work correctly.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
Acked-by: David Daney <ddaney@caviumnetworks.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/4937/
2013-02-19 09:36:15 +01:00
Gabor Juhos
90a938d1ad MIPS: ath79: use dynamically allocated USB platform devices
The current code uses static resources and static platform
device instances for the possible USB controllers in the
system. These static variables contains initial values which
leads to data segment pollution.

Remove the static variables and use dynamically allocated
structures instead.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4933/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:42 +01:00
Gabor Juhos
fd633cf1cf ath79: remove ATH79_MISC_IRQ_* defines
Use the ATH79_MISC_IRQ() macro instead.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4930/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:42 +01:00
Gabor Juhos
7e69c10a8e ath79: add ATH79_CPU_IRQ() macro
Remove the individual ATH79_CPU_IRQ_* constants and
use the new macro instead of those.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4929/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:41 +01:00
Gabor Juhos
326e8d17d7 MIPS: pci-ar71xx: move irq base to the controller structure
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4928/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:41 +01:00
Gabor Juhos
42cb60d1fa MIPS: pci-ar71xx: remove static PCI IO/MEM resources
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4927/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:40 +01:00
Gabor Juhos
f18118a868 MIPS: pci-ar71xx: use dynamically allocated PCI controller structure
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4926/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:40 +01:00
Gabor Juhos
12401fc28d MIPS: pci-ar724x: setup command register of the PCI controller
The command register of the PCI controller is
not initialized correctly by the bootloader on
some boards and this leads to non working PCI
bus.

Add code to initialize the command register
from the Linux code to avoid this.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4916/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:39 +01:00
Gabor Juhos
8b66d46118 MIPS: pci-ar724x: use per-controller IRQ base
Change to the code to use per-controller IRQ base.
This is needed for multiple PCI controller support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4915/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:39 +01:00
Gabor Juhos
34b134aebd MIPS: pci-ar724x: remove static PCI IO/MEM resources
Static resources become impractical when multiple
PCI controllers are present. Move the resources
into the platform device registration code and
change the probe routine to get those from there
platform device's resources.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4914/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:39 +01:00
Gabor Juhos
908339ef25 MIPS: pci-ar724x: use dynamically allocated PCI controller structure
The current code uses static variables to store the
PCI controller specific data. This works if the system
contains one PCI controller only, however it becomes
impractical when multiple PCI controllers are present.

Move the variables into a dynamically allocated controller
specific structure, and use that instead of the static
variables.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4912/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:38 +01:00
Gabor Juhos
617fed41e9 MIPS: ath79: allow to specify bus number in PCI IRQ maps
This is needed for multiple PCI bus support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4913/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:38 +01:00
Gabor Juhos
15b6dcba42 MIPS: add dummy pci_load_of_ranges
The pci_load_of_ranges function is only available if
CONFIG_OF is selected. If the function is used without
CONFIG_OF being enabled it will cause a build error.

Add a dummy inline function to avoid this.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4911/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:37 +01:00
Gabor Juhos
2228317877 MIPS: avoid possible resource conflict in register_pci_controller
The IO and memory resources of a PCI controller
might already have a parent resource set when
they are passed to 'register_pci_controller'.

If the parent resource is set, the request_resource
call will fail due to resource conflict and the
current code will not be able to register the
PCI controller.

Use the parent resource if it is available in the
request_resource call to avoid the isssue.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4910/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:37 +01:00
Gabor Juhos
6e783865b4 MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functions
The functions are unused now, so remove them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4909/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:36 +01:00
Gabor Juhos
9fc1ca5b73 MIPS: ath79: register platform devices for the PCI controllers
The pci-ar71xx and pci-ar724x drivers were converted
into platform drivers. Register the corresponding
platform devices for the PCI controllers instead
of using the ar7{1x,24}x_pcibios_init functions.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4908/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:36 +01:00
Gabor Juhos
ad4ce92e91 MIPS: ath79: move global PCI defines into a common header
The constants will be used by a subsequent patch.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4907/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:35 +01:00
Gabor Juhos
fb167e891d MIPS: pci-ar71xx: convert into a platform driver
The patch converts the pci-ar71xx driver into a
platform driver. This makes it possible to register
the PCI controller as a plain platform device.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4906/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:35 +01:00
Gabor Juhos
58d2e9bcd6 MIPS: pci-ar724x: convert into a platform driver
The patch converts the pci-ar724x driver into a
platform driver. This makes it possible to register
the PCI controller as a plain platform device.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4905/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:35 +01:00
Gabor Juhos
d3d2b4200b MIPS: ralink: add CPU interrupt controller to of_irq_ids
Convert the ralink IRQ code to make use of the new MIPS IRQ controller OF
mappings.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4900/
2013-02-17 01:25:34 +01:00
Gabor Juhos
0916b46962 MIPS: add irqdomain support for the CPU IRQ controller
Add code to load a irq_domain for the MIPS IRQ controller from a devicetree
file.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: http://patchwork.linux-mips.org/patch/4902/
2013-02-17 01:25:34 +01:00
John Crispin
6d63d70f9f MIPS: ralink: adds default config file
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:33 +01:00
John Crispin
ae2b5bb657 MIPS: ralink: adds Kbuild files
Add the Kbuild symbols and Makefiles needed to actually build the ralink code
from this series

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4899/
2013-02-17 01:25:32 +01:00
John Crispin
5644da4f63 MIPS: ralink: adds rt305x devicetree
This adds the devicetree file that describes the rt305x evaluation kit.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4898/
2013-02-17 01:25:32 +01:00
John Crispin
2809b31770 MIPS: ralink: adds support for RT305x SoC family
Add support code for rt3050, rt3052, rt3350, rt3352 and rt5350 SOC.

The code detects the SoC and registers the clk / pinmux settings.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4896/
2013-02-17 01:25:31 +01:00
John Crispin
5fff610b7c MIPS: ralink: adds early_printk support
Add the code needed to make early printk work.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4897/
2013-02-17 01:25:31 +01:00
John Crispin
3a5bfe7bdb MIPS: ralink: adds OF code
Until there is a generic MIPS way of handing the DTB over from bootloader to
kernel we rely on a built in devicetrees. The OF code also remaps those register
ranges that we use global in our drivers.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4895/
2013-02-17 01:25:31 +01:00
John Crispin
3f0a06b036 MIPS: ralink: adds clkdev code
These SoCs have a limited number of fixed rate clocks. Add support for the
clk and clkdev api.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4894/
2013-02-17 01:25:30 +01:00
John Crispin
7e47cefa69 MIPS: ralink: adds prom and cmdline code
Add minimal code to handle commandlines.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4892/
2013-02-17 01:25:30 +01:00
John Crispin
c06e836ada MIPS: ralink: adds reset code
Resetting these SoCs requires no real magic. The code is straight forward.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4891/
2013-02-17 01:25:29 +01:00
John Crispin
19d3814e7b MIPS: ralink: adds irq code
All of the Ralink Wifi SoC currently supported by this series share the same
interrupt controller (INTC).

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4890/
2013-02-17 01:25:29 +01:00
John Crispin
8563991026 MIPS: ralink: adds include files
Before we start adding the platform code we add the common include files.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4893/
2013-02-17 01:25:28 +01:00
Gabor Juhos
9c099c4e79 MIPS: ath79: simplify MISC IRQ handling
The current code uses multiple if statements for
demultiplexing the different interrupt sources.
Additionally, the MISC interrupt controller has
32 interrupt sources and the current code does not
handles all of them.

Get rid of the if statements and process all interrupt
sources in a loop to fix these issues.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4874/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Gabor Juhos
f160a289e0 MIPS: ath79: simplify ath79_gpio_function_* routines
Make ath79_gpio_function_{en,dis}able to be wrappers
around ath79_gpio_function_setup.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4871/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Gabor Juhos
8838becdf5 MIPS: ath79: fix GPIO function selection for AR934x SoCs
GPIO function selection is not working on the AR934x
SoCs because the offset of the function selection
register is different on those.

Add a helper routine which returns the correct
register address based on the SoC type, and use
that in the 'ath79_gpio_function_*' routines.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4870/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:27 +01:00
Steven J. Hill
778eeb1b19 MIPS: Add new GIC clocksource.
Add new clocksource that uses the counter present on the MIPS
Global Interrupt Controller.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4681/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 01:25:21 +01:00
Steven J. Hill
4cb764b454 MIPS: dsp: Simplify the DSP macros.
Simplify the DSP macros for vanilla (non-microMIPS) kernels and
toolchains that do not support the DSP ASEs.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4687/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:24 +01:00
Steven J. Hill
d0c1b478e0 MIPS: dsp: Support toolchains without DSP ASE and microMIPS.
Add macros to support the DSP ASE with microMIPS kernels when the
toolchain does not have support.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4686/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:24 +01:00
Steven J. Hill
32a7ede673 MIPS: dsp: Add assembler support for DSP ASEs.
Newer toolchains support the DSP and DSP Rev2 instructions. This patch
performs a check for that support and adds compiler and assembler
flags for only the files that need use those instructions.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Acked-by: Florian Fainelli <florian@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4752/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:23 +01:00
Steven J. Hill
f8fa4811db MIPS: Add support for the M14KEc core.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4682/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:23 +01:00
Steven J. Hill
127993e561 MIPS: Clean-ups for MIPS Technologies Inc. generic header file.
Clean up standard header text and remove unused #define.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Patchwork: http://patchwork.linux-mips.org/patch/4703/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:22 +01:00
Jayachandran C
7b53eb4d40 MIPS: PCI: Multi-node PCI support for Netlogic XLP
On a multi-chip XLP board, each node can have 4 PCIe links. Update
XLP PCI code to initialize PCIe on all the nodes.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4803/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:22 +01:00
Jayachandran C
cba3b64303 MIPS: Netlogic: Fix for quad-XLP boot
On multi-chip boards, the first core on slave SoCs may take much
more time to wakeup. Add code to wait for the core to come up before
proceeding with the rest of the boot up.

Update xlp_wakeup_core to also skip the boot node and the boot CPU
initialization which is already complete.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4783/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:22 +01:00
Jayachandran C
37a7059bc4 MIPS: Netlogic: use preset loops per jiffy
Doing calibrate delay on a hardware thread will be inaccurate since
it depends on the load on other threads in the core. It will also
slow down the boot process when done for 128 hardware threads. Switch
to a pre-computed loops per jiffy based on the core frequency. The
value is computed based on the core frequency and roughly matches the
value calculated by calibrate_delay().

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4791/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:21 +01:00
Jayachandran C
5a4cbe3811 MIPS: Netlogic: No hazards needed for XLR/XLS
TLB and COP0 hazards are handled in hardware for Netlogic XLR/XLS
SoCs. Update hazards.h to pick more optimal set of definitions when
compiling for XLR/XLS.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4788/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:21 +01:00
Jayachandran C
8cd3d64c57 MIPS: PCI: Prevent hang on XLP reg read
Reading PCI extended register at 0x255 on a bridge will hang if there
is no device connected on the link. Make PCI read routine skip this
register.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4789/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:20 +01:00
Jayachandran C
4e45e542cd MIPS: Netlogic: Use PIC timer as a clocksource
The XLR/XLS/XLP PIC has a 8 countdown timers which run at the PIC
frequencey. One of these can be used as a clocksource to provide
timestamps that is common across cores. This can be used in place
of the count/compare clocksource which is per-CPU.

On XLR/XLS PIC registers are 32-bit, so we just use the lower 32-bits
of the PIC counter. On XLP, the whole 64-bit can be used.

Provide common macros and functions for PIC timer registers on XLR/XLS
and XLP, and use them to register a PIC clocksource.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4786/
Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-17 00:15:20 +01:00