Implement SRST, COMRESET and standard postreset component operations
for ata_drive_probe_reset(), and use these three functions to
implement ata_std_probe_reset.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Most low level drivers share supported reset/classify actions and
sequence. This patch implements ata_drive_probe_reset() which helps
constructing ->probe_reset from three component operations -
softreset, hardreset and postreset. This minimizes duplicate code and
yet allows flexibility if needed. The three component operations can
also be shared by EH later.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Add new ->probe_reset operation to ata_port_operations obsoleting
->phy_reset. The main difference from ->phy_reset is that the new
operation is not allowed to manipulate libata internals directly.
It's not allowed to configure or disable the port or devices. It can
only succeed or fail and classify attached devices into passed
@classes.
This change gives more control to higher level and eases sharing reset
methods with EH.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Make ata_dev_try_classify take @r_err to store tf error register value
on completion and return device class instead of directly manipulating
dev->class. This is preparation for new reset mechanism.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Export ata_busy_sleep(), to be used by low level driver reset functions.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Add constants needed to perform SRST. This is preparation for adding
softreset method.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Implement ata_eh_qc_complete/retry() using scsi_eh_finish_cmd() and
scsi_eh_flush_done_q(). This removes all eh scsicmd finish hacks from
low level drivers.
This change was first suggested by Jeff Garzik.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Export two SCSI EH command handling functions. To be used by libata EH.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Return AC_ERR_* mask from issue fuctions instead of 0/-1. This
enables things like failing a qc with AC_ERR_HSM when the device
doesn't set DRDY when the qc is about to be issued.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Add detailed AC_ERR_* flags and use them. Long-term goal is to
describe all errors with err_mask and tf combination (tf for failed
sector information, etc...). After proper error diagnosis is
implemented, sense data should also be generated from err_mask instead
of directly from hardware tf registers as it is currently.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
In ahci_host_intr err_mask is determined from IRQ status but never
used. This patch sets qc->err_mask to the determined err_mask.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
When ata_qc_issue() fails, the qc might have been dma mapped or not.
So, performing only ata_qc_free() results in dma map leak. This patch
makes ata_qc_issue() mark dma map flags correctly on failure and calls
ata_qc_complete() after ata_qc_issue() fails.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
qc used to be freed automatically on command completion. However, as
a qc can carry information about its completion status, it can be
useful to its owner/issuer after command completion. This patch makes
freeing qc responsibility of its owner. This simplifies
ata_exec_internal() and makes command turn-around for atapi request
sensing less hackish.
This change was originally suggested by Jeff Garzik.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
All ata_qc_free() does is calling __ata_qc_complete() which isn't used
anywhere else. Fold __ata_qc_complete() into ata_qc_free().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Unlike their older siblings, ICH6 and 7 use different scheme for MAP
VALUE. This patch makes ata_piix interpret MV properly on ICH6/7.
Pre-ICH6/7
The value of these bits indicate the address range the SATA port
responds to, and whether or not the SATA and IDE functions are
combined.
000 = Non-combined. P0 is primary master. P1 is secondary master.
001 = Non-combined. P0 is secondary master. P1 is primary master.
100 = Combined. P0 is primary master. P1 is primary slave. P-ATA is
2:0 Map Value secondary.
101 = Combined. P0 is primary slave. P1 is primary master. P-ATA is
secondary.
110 = Combined. P-ATA is primary. P0 is secondary master. P1 is
secondary slave.
111 = Combined. P-ATA is primary. P0 is secondary slave. P1 is
secondary master.
ICH6/7
Map Value - R/W. Map Value (MV): The value in the bits below indicate
the address range the SATA ports responds to, and whether or not the
PATA and SATA functions are combined. When in combined mode, the AHCI
memory space is not available and AHCI may not be used.
00 = Non-combined. P0 is primary master, P2 is the primary slave. P1
is secondary master, P3 is the 1:0 secondary slave (desktop
only). P0 is primary master, P2 is the primary slave (mobile
only).
01 = Combined. IDE is primary. P1 is secondary master, P3 is the
secondary slave. (desktop only)
10 = Combined. P0 is primary master. P2 is primary slave. IDE is secondary
11 = Reserved
Signed-off-by: Tejun Heo <htejun@gmail.com>
--
Jeff, without this patch, ata_piix misdetects my ICH7's combined mode,
ending up not applying bridge limits to PX-710SA and configuring IDE
drive on 40-c cable to UDMA/66.
Thanks.
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Separate out sata_print_link_status() from __sata_phy_reset().
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Alan Cox <alan@redhat.com>
Somewhat cleaner in the resync as someone cleaned up the pio xfer users
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
I misread the spec when doing the original. I've tested the corrected
version with pre UDMA drives and it now picks the right modes. This is a
specific bug fix rather than an update or new feature item.
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
This patch adds the Intel ICH8 DID's to the ahci.c file for AHCI mode
SATA support.
Signed-off-by: Jason Gaston <Jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Remove the "inline" keyword from a bunch of big functions in the kernel with
the goal of shrinking it by 30kb to 40kb
Signed-off-by: Arjan van de Ven <arjan@infradead.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Given the semantic changes in both the device-model and
fc-transport APIs, the driver's handling of port-type RSCNs
via a series of ADISCs and PLOGIs can cause series of
badness ranging from unexpectedly device loss to devices not
being discovered.
In the interim, disable (via a module-parameter) this
feature and allow RSCN management to continue to occur
within the driver's DPC thread.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Similarly to other ISPs, set execution throttle to maximum
allowed value since 'throttling' is done on a per-lun basis
via queue-depth.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Simplify essentially duplicate load RISC RAM implementation
in qla2x00_load_ram_ext() and qla2x00_load_ram().
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Swing/emphasis settings in NVRAM were not being honoured due
to the driver not converting the serial-link options from LE
to host-endian format.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
If the Get Port Database call fails during local-loop
update, then schedule the DPC routine to perform a rescan as
the firmware would have updated the Get ID List port-entries
of their new state.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Small changes to register retrieval and order as per latest
firmware specification.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Driver would not correctly re-enable the write-protection
bits of the flash part after updates.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Problem report (against 2.4.x driver) from Jeff Layton
<jlayton@redhat.com>:
An OEM noticed that the U6 qla2200 driver would hang for
around 2 minutes at boot time and then proceed normally. I
found that the delay was occurring when loading the new
firmware into the card, and was due to a
schedule_timeout(10) added to the bottom of the polling
loop.
Some testing showed that the load ram operation on the card
was very quick (on the order of a couple of jiffies), but
the sleep in the polling loop was making each operation take
around 25-30.
The attached patch corrects this by making it skip sleeping
during the load ram operation, since I believe we only do
that when the module is plugged in. It also skips sleeping
if the mbox_int flag got set during the current loop.
This corrected the hang on my test setup, and OEM also
confirmed that it corrected the problem for them.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
Mailbox commands are polled for completion during ISP
initialization. During potentially 'long' mailbox commands
(i.e. fabric login), we really don't want a busy-wait delay
to potentially trigger a (benign) soft-lockup BUG().
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
There's no point in displaying the message during a valid
underrun case. Limit the message to potentially problematic
cases.
Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
