Store the base address of the pci host controller registers in struct
pci_channel and use the address in pci_read_reg() and pci_write_reg().
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Store a struct pci_channel pointer in bus->sysdata. This makes whatever
struct pci_channel assigned to a bus available for sh4_pci_read() and
sh4_pci_write(). We also modify PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to
use bus->sysdata - this to gives us support for multiple pci channels.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Replaces PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM with direct struct
pci_channel access. This allows us to have more than one pci
channel.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch adds an init callback to struct pci_channel and makes sure
it is initialized properly. Code is added to call this init function
from pcibios_init(). Return values are adjusted and a warning is is
printed if init fails.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
These patches rework the pci code for the sh architecture.
Currently each board implements some kind of ioport to address mapping.
Some boards use generic_io_base others try passing addresses as io ports.
This is the first set of patches that try to unify the pci code as much
as possible to avoid duplicated code. This will in the end lead to fewer
lines board specific code and more generic code.
This patch makes sure a struct pci_channel pointer is passed along to
various pci functions such as pci_read_reg(), pci_write_reg(),
pci_fixup_pcic(), sh7751_pcic_init() and sh7780_pcic_init().
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix the problem that cannot work PCI device on 32-bit mode because
influence of the commit 68b42d1b54
("sh: sh7785lcr: Map whole PCI address space."). So this patch was
implement like a 29-bit mode, map whole physical address space of
DDR-SDRAM.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
PCI still doesn't work on sh7785lcr 29bit 256M map mode.
On SH7785, PCI -> SHwy address translation is not base+offset but
somewhat like base|offset (See HW Manual (rej09b0261) Fig. 13.11).
So, you can't export CS2,3,4,5 by 256M at CS2 (results CS0,1,2,3
exported, I guess). There are two candidates.
a) 128M@CS2 + 128M@CS4
b) 512M@CS0
Attached patch is B. It maps 512M Byte at 0 independently of memory
size. It results CS0 to CS6 and perhaps some more being accessible
from PCI.
Tested on
7785lcr 29bit 128M map
7785lcr 29bit 256M map
(NOT tested on 32bit)
Signed-off-by: Takashi YOSHII <yoshii.takashi@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix the problem that cannot work a PCI device when 32-bit physical
address mode.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Use the generic pci_common_swizzle() instead of arch-specific code.
Note that pci_common_swizzle() loops based on dev->bus->self, not
dev->bus->parent as the sh simple_swizzle() did. I think they
are equivalent for this purpose.
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code.
Acked-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This also fixes up a long-standing bug for this platform where the PIO
base was set to a register offset, rather than the actual PIO offset
itself.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Fix the problem that cannot work a PCI device when system memory size is
256Mbyte in 29bit address mode.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the sparc changes a439fe51a1.
Most of the moving about was done with Sam's directions at:
http://marc.info/?l=linux-sh&m=121724823706062&w=2
with subsequent hacking and fixups entirely my fault.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds initial support for the Renesas R0P7785LC0011RL board.
This patch supports 29bit address mode only.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch makes the needlessly global pcibios_max_latency static.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch makes the needlessly global EARLY_PCI_OP's static.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch fixes the following build error:
<-- snip -->
...
MODPOST 1837 modules
ERROR: "board_pci_channels" [drivers/pcmcia/yenta_socket.ko] undefined!
...
make[2]: *** [__modpost] Error 1
<-- snip -->
I freely admit that it's a pathological configuration, but as long as
it is allowed it should build.
Reported-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Russell King did the following back in 2003:
<-- snip -->
[PCI] pci-9: Kill per-architecture pcibios_update_resource()
Kill pcibios_update_resource(), replacing it with pci_update_resource().
pci_update_resource() uses pcibios_resource_to_bus() to convert a
resource to a device BAR - the transformation should be exactly the
same as the transformation used for the PCI bridges.
pci_update_resource "knows" about 64-bit BARs, but doesn't attempt to
set the high 32-bits to anything non-zero - currently no architecture
attempts to do something different. If anyone cares, please fix; I'm
going to reflect current behaviour for the time being.
Ivan pointed out the following architectures need to examine their
pcibios_update_resource() implementation - they should make sure that
this new implementation does the right thing. #warning's have been
added where appropriate.
ia64
mips
mips64
This cset also includes a fix for the problem reported by AKPM where
64-bit arch compilers complain about the resource mask being placed
in a u32.
<-- snip -->
This patch removes the unused pcibios_update_resource() functions the
kernel gained since, from FRV, m68k, mips & sh architectures.
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Acked-by: David Howells <dhowells@redhat.com>
Acked-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Almost all implementations of pci_iomap() in the kernel, including the generic
lib/iomap.c one, copies the content of a struct resource into unsigned long's
which will break on 32 bits platforms with 64 bits resources.
This fixes all definitions of pci_iomap() to use resource_size_t. I also
"fixed" the 64bits arch for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
We currently keep 2 lists of PCI devices in the system, one in the
driver core, and one all on its own. This second list is sorted at boot
time, in "BIOS" order, to try to remain compatible with older kernels
(2.2 and earlier days). There was also a "nosort" option to turn this
sorting off, to remain compatible with even older kernel versions, but
that just ends up being what we have been doing from 2.5 days...
Unfortunately, the second list of devices is not really ever used to
determine the probing order of PCI devices or drivers[1]. That is done
using the driver core list instead. This change happened back in the
early 2.5 days.
Relying on BIOS ording for the binding of drivers to specific device
names is problematic for many reasons, and userspace tools like udev
exist to properly name devices in a persistant manner if that is needed,
no reliance on the BIOS is needed.
Matt Domsch and others at Dell noticed this back in 2006, and added a
boot option to sort the PCI device lists (both of them) in a
breadth-first manner to help remain compatible with the 2.4 order, if
needed for any reason. This option is not going away, as some systems
rely on them.
This patch removes the sorting of the internal PCI device list in "BIOS"
mode, as it's not needed at all anymore, and hasn't for many years.
I've also removed the PCI flags for this from some other arches that for
some reason defined them, but never used them.
This should not change the ordering of any drivers or device probing.
[1] The old-style pci_get_device and pci_find_device() still used this
sorting order, but there are very few drivers that use these functions,
as they are deprecated for use in this manner. If for some reason, a
driver rely on the order and uses these functions, the breadth-first
boot option will resolve any problem.
Cc: Matt Domsch <Matt_Domsch@dell.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Commit e036eaa681 broke dreamcast pci, this
patch fixes that by reverting the dreamcast specific bits.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Adrian McMenamin <adrian@mcmen.demon.co.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Use generic_io_base to point out the pci io window, and make sure the
highest port address used is SH7751_PCI_IO_SIZE - 1.
This patch fixes pci io port access for the r2d boards - CONFIG_8139TOO_PIO
now works as expected. So does the alsa driver for CMI8738.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Katsuya MATSUBARA <matsu@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch makes sure ctrl_inN/outN are used instead of inN/outN for on chip
pci registers. Without this patch addresses may be adjusted using the value
in generic_io_base. This patch makes it possible to set generic_io_base and
have pci without reading and writing all over the place.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Katsuya MATSUBARA <matsu@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
A HOWTO that hasn't been updated for half a dozen years no longer
"contains valuable information about which PCI hardware does work under
Linux and which doesn't".
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch updates the board specific irq code for r7780rp. The new code is
very similar to the other highlander implementations, with the exception that
the r7780rp handles pci interrupts using IRL. To simplify the pci code and
use the same interrupt numbers as r7780mp and r7785rp we hook in to the
cpu specific pci vectors.
The pci interrupts and the push switch all work well with and without this
patch. CF and AX88796 are not ok though and the source of the problem is
unknown at this point. The AX88796 does for not detect it's proper mac
address (IPL gets it right) and the kernel hangs on CF access. As a workaround
this patch removes the CF and the AX88796 from the platform datain case of
r7780rp.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch makes the dreamcast use the recently added declared coherent
memory functions to point out the memory window suitable for dma.
Apart from cleaning up, this gives the dreamcast a proper memory allocator
for pci dma memory.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add support for Renesas Technology Europe SDK7780 board.
Signed-off-by: Nicholas Beck <nbeck@mpc-data.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The IO access of PCI is not supported in R7780RP and the MS7780SE
board now. The support of the IO access mode of e100 and a lot of IDE
chips becomes possible by fixing the code.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
PCI IO space base address of SH7780 was wrong.
Change from 0xFE400000 to 0xFE200000.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The ST40 stuff in-tree hasn't built for some time, and hasn't been
updated for over 3 years. ST maintains their own out-of-tree changes
and rebases occasionally, and that's ultimately where all of the ST40
users go anyways.
In order for the ST40 code to be brought up to date most of the stuff
removed in this changeset would have to be rewritten anyways, so there's
very little benefit in keeping the remnants around either.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
I'm converting most array size calculations under arch/ to use the
ARRAY_SIZE() macro. This is the (tiny) patch for sh.
Signed-off-by: Alejandro Martinez Ruiz <alex@flawedcode.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
dma_cache_(wback|inv|wback_inv) were the earliest attempt on a generalized
cache managment API for I/O purposes. Originally it was basically the raw
MIPS low level cache API exported to the entire world. The API has
suffered from a lack of documentation, was not very widely used unlike it's
more modern brothers and can easily be replaced by dma_cache_sync. So
remove it rsp. turn the surviving bits back into an arch private API, as
discussed on linux-arch.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Paul Mackerras <paulus@samba.org>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Kyle McMartin <kyle@parisc-linux.org>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch removes the sh778x specific pci code that pokes in the
interrupt controller and overwrites things. The new and improved IRL
code manages this in plat_irq_setup() and plat_irq_setup_pins()
instead.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch converts the board specific interrupt code for r2d to make
use of intc. While at it we improve the Kconfig to avoid confusion.
- Two sets of interrupt tables exist - one for R2D-1 and one for R2D-PLUS.
- R2D-1 and R2D-PLUS use the same irq constants.
- R2D-1 has AX88796 support, R2D-PLUS does not hook up that IRQ.
- R2D-PLUS has KEY support, R2D-1 does not hook up that IRQ.
- The number and order of IRQ values are disconnected from register bits.
- Interrupt sources now start from IRQ 100.
- The machvec demux function converts from irlm IRQ 0-14 to IRQ 100++.
Tested on R2D-1 and R2D-PLUS boards.
Version 2 adds CONFIG_RTS7751R2D_1 and CONFIG_RTS7751R2D_PLUS together
with intc structured as __initdata.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This patch updates the r2d board support in a few ways:
- CPU_SUBTYPE_SH7751R is selected in the defconfig to play well
with the r2d board Kconfig entry. Without this the defconfig
results in no board enabled.
- Enable EARLY_PRINTK.
- Enable SH_STANDARD_BIOS
- this works well for early printk on the r2d board.
- Add "earlyprink=bios" to the cmdline for early serial port
output by default.
- CONFIG_SUBTYPE_SH7751R support is added to the sh-specific
pci makefile.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
SH-2 can presently get in to some pretty bogus states, so
we tidy up the dependencies a bit and get it all building
again.
This gets us a bit closer to a functional allyesconfig
and allmodconfig, though there are still a few things to
fix up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Remove includes of <linux/smp_lock.h> where it is not used/needed.
Suggested by Al Viro.
Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc,
sparc64, and arm (all 59 defconfigs).
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Some fixups for the R7785RP board. Gets iVDR working.
Signed-off-by: Ryusuke Sakato <sakato.ryusuke@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Add support for the SH7780 PCIC on the Solution Engine 7780,
missing from the previous board-support patch.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds support for the SH7780-based Solution Engine reference board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.zh@hitachi.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
