69c26a7f62
This is a snapshot of mdss driver from msm-4.14 as of commit '15e898828d1e (fbdev: msm: Avoid UAF in mdss_dsi_cmd_write)'. Change-Id: I16fe01fd45855d5c268c210ec61f09c6fa625761 Signed-off-by: Nirmal Abraham <nabrah@codeaurora.org> Signed-off-by: Althaf Neelanchirayil <aneelanc@codeaurora.org>
117 lines
3.2 KiB
C
117 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2012, 2017-2018, 2020, The Linux Foundation. All rights reserved. */
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#ifndef __MDSS_IO_UTIL_H__
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#define __MDSS_IO_UTIL_H__
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/i2c.h>
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#include <linux/types.h>
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#ifdef DEBUG
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#define DEV_DBG(fmt, args...) pr_err(fmt, ##args)
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#else
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#define DEV_DBG(fmt, args...) pr_debug(fmt, ##args)
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#endif
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#define DEV_INFO(fmt, args...) pr_info(fmt, ##args)
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#define DEV_WARN(fmt, args...) pr_warn(fmt, ##args)
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#define DEV_ERR(fmt, args...) pr_err(fmt, ##args)
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struct dss_io_data {
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u32 len;
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void __iomem *base;
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};
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void dss_reg_w(struct dss_io_data *io, u32 offset, u32 value, u32 debug);
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u32 dss_reg_r(struct dss_io_data *io, u32 offset, u32 debug);
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void dss_reg_dump(void __iomem *base, u32 len, const char *prefix, u32 debug);
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#define DSS_REG_W_ND(io, offset, val) dss_reg_w(io, offset, val, false)
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#define DSS_REG_W(io, offset, val) dss_reg_w(io, offset, val, true)
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#define DSS_REG_R_ND(io, offset) dss_reg_r(io, offset, false)
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#define DSS_REG_R(io, offset) dss_reg_r(io, offset, true)
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enum dss_vreg_type {
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DSS_REG_LDO,
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DSS_REG_VS,
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};
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enum dss_vreg_mode {
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DSS_REG_MODE_ENABLE,
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DSS_REG_MODE_DISABLE,
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DSS_REG_MODE_LP,
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DSS_REG_MODE_ULP,
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DSS_REG_MODE_MAX,
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};
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struct dss_vreg {
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struct regulator *vreg; /* vreg handle */
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char vreg_name[32];
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int min_voltage;
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int max_voltage;
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u32 load[DSS_REG_MODE_MAX];
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int enable_load;
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int disable_load;
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int pre_on_sleep;
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int post_on_sleep;
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int pre_off_sleep;
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int post_off_sleep;
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bool lp_disable_allowed;
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bool disabled;
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};
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struct dss_gpio {
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unsigned int gpio;
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unsigned int value;
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char gpio_name[32];
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};
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enum dss_clk_type {
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DSS_CLK_AHB, /* no set rate. rate controlled through rpm */
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DSS_CLK_PCLK,
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DSS_CLK_OTHER,
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};
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struct dss_clk {
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struct clk *clk; /* clk handle */
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char clk_name[32];
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enum dss_clk_type type;
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unsigned long rate;
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};
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struct dss_module_power {
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unsigned int num_vreg;
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struct dss_vreg *vreg_config;
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unsigned int num_gpio;
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struct dss_gpio *gpio_config;
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unsigned int num_clk;
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struct dss_clk *clk_config;
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};
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int msm_dss_ioremap_byname(struct platform_device *pdev,
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struct dss_io_data *io_data, const char *name);
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void msm_dss_iounmap(struct dss_io_data *io_data);
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int msm_dss_enable_gpio(struct dss_gpio *in_gpio, int num_gpio, int enable);
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int msm_dss_gpio_enable(struct dss_gpio *in_gpio, int num_gpio, int enable);
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int msm_dss_config_vreg(struct device *dev, struct dss_vreg *in_vreg,
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int num_vreg, int config);
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int msm_dss_enable_vreg(struct dss_vreg *in_vreg, int num_vreg, int enable);
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int msm_dss_config_vreg_opt_mode(struct dss_vreg *in_vreg, int num_vreg,
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enum dss_vreg_mode mode);
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int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry,
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int num_clk);
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void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk);
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int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk);
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int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable);
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int dss_i2c_byte_read(struct i2c_client *client, uint8_t slave_addr,
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uint8_t reg_offset, uint8_t *read_buf);
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int dss_i2c_byte_write(struct i2c_client *client, uint8_t slave_addr,
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uint8_t reg_offset, uint8_t *value);
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#endif /* __MDSS_IO_UTIL_H__ */
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