1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
112 lines
2.3 KiB
ArmAsm
112 lines
2.3 KiB
ArmAsm
/*
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* Copyright 2001 MontaVista Software Inc.
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* Author: jsun@mvista.com or jsun@junsun.net
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*
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* First-level interrupt dispatcher for ddb5476
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <asm/asm.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/regdef.h>
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#include <asm/stackframe.h>
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#include <asm/ddb5xxx/ddb5476.h>
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/*
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* first level interrupt dispatcher for ocelot board -
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* We check for the timer first, then check PCI ints A and D.
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* Then check for serial IRQ and fall through.
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*/
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.align 5
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NESTED(ddb5476_handle_int, PT_SIZE, sp)
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SAVE_ALL
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CLI
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.set at
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.set noreorder
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mfc0 t0, CP0_CAUSE
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mfc0 t2, CP0_STATUS
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and t0, t2
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andi t1, t0, STATUSF_IP7 /* cpu timer */
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bnez t1, ll_cpu_ip7
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andi t1, t0, STATUSF_IP2 /* vrc5476 & i8259 */
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bnez t1, ll_cpu_ip2
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andi t1, t0, STATUSF_IP3
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bnez t1, ll_cpu_ip3
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andi t1, t0, STATUSF_IP4
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bnez t1, ll_cpu_ip4
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andi t1, t0, STATUSF_IP5
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bnez t1, ll_cpu_ip5
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andi t1, t0, STATUSF_IP6
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bnez t1, ll_cpu_ip6
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andi t1, t0, STATUSF_IP0 /* software int 0 */
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bnez t1, ll_cpu_ip0
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andi t1, t0, STATUSF_IP1 /* software int 1 */
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bnez t1, ll_cpu_ip1
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nop
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.set reorder
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/* wrong alarm or masked ... */
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// j spurious_interrupt
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move a0, sp
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jal vrc5476_irq_dispatch
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j ret_from_irq
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nop
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.align 5
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ll_cpu_ip0:
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li a0, CPU_IRQ_BASE + 0
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpu_ip1:
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li a0, CPU_IRQ_BASE + 1
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpu_ip2: /* jump to second-level dispatching */
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move a0, sp
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jal vrc5476_irq_dispatch
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j ret_from_irq
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ll_cpu_ip3:
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li a0, CPU_IRQ_BASE + 3
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpu_ip4:
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li a0, CPU_IRQ_BASE + 4
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpu_ip5:
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li a0, CPU_IRQ_BASE + 5
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpu_ip6:
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li a0, CPU_IRQ_BASE + 6
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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ll_cpu_ip7:
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li a0, CPU_IRQ_BASE + 7
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move a1, sp
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jal do_IRQ
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j ret_from_irq
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END(ddb5476_handle_int)
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