014e73c99a
This patch moves a few subroutines around in the uhci-hcd source file. Nothing else is changed. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
915 lines
23 KiB
C
915 lines
23 KiB
C
/*
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* Universal Host Controller Interface driver for USB.
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*
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* Maintainer: Alan Stern <stern@rowland.harvard.edu>
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*
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* (C) Copyright 1999 Linus Torvalds
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* (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
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* (C) Copyright 1999 Randy Dunlap
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* (C) Copyright 1999 Georg Acher, acher@in.tum.de
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* (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
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* (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
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* (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
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* (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
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* support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
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* (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
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* (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
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*
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* Intel documents this fairly well, and as far as I know there
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* are no royalties or anything like that, but even so there are
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* people who decided that they want to do the same thing in a
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* completely different way.
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*
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* WARNING! The USB documentation is downright evil. Most of it
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* is just crap, written by a committee. You're better off ignoring
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* most of it, the important stuff is:
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* - the low-level protocol (fairly simple but lots of small details)
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* - working around the horridness of the rest
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*/
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#include <linux/config.h>
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#ifdef CONFIG_USB_DEBUG
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#define DEBUG
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#else
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#undef DEBUG
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#endif
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/smp_lock.h>
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#include <linux/errno.h>
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#include <linux/unistd.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/debugfs.h>
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#include <linux/pm.h>
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#include <linux/dmapool.h>
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#include <linux/dma-mapping.h>
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#include <linux/usb.h>
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#include <linux/bitops.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include "../core/hcd.h"
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#include "uhci-hcd.h"
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/*
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* Version Information
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*/
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#define DRIVER_VERSION "v2.2"
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#define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
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Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
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Alan Stern"
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#define DRIVER_DESC "USB Universal Host Controller Interface driver"
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/*
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* debug = 0, no debugging messages
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* debug = 1, dump failed URB's except for stalls
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* debug = 2, dump all failed URB's (including stalls)
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* show all queues in /debug/uhci/[pci_addr]
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* debug = 3, show all TD's in URB's when dumping
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*/
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#ifdef DEBUG
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static int debug = 1;
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#else
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static int debug = 0;
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#endif
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module_param(debug, int, S_IRUGO | S_IWUSR);
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MODULE_PARM_DESC(debug, "Debug level");
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static char *errbuf;
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#define ERRBUF_LEN (32 * 1024)
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static kmem_cache_t *uhci_up_cachep; /* urb_priv */
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static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
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/* If a transfer is still active after this much time, turn off FSBR */
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#define IDLE_TIMEOUT msecs_to_jiffies(50)
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#define FSBR_DELAY msecs_to_jiffies(50)
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/* When we timeout an idle transfer for FSBR, we'll switch it over to */
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/* depth first traversal. We'll do it in groups of this number of TD's */
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/* to make sure it doesn't hog all of the bandwidth */
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#define DEPTH_INTERVAL 5
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#include "uhci-hub.c"
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#include "uhci-debug.c"
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#include "uhci-q.c"
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static int ports_active(struct uhci_hcd *uhci)
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{
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unsigned long io_addr = uhci->io_addr;
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int connection = 0;
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int i;
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for (i = 0; i < uhci->rh_numports; i++)
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connection |= (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_CCS);
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return connection;
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}
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static int suspend_allowed(struct uhci_hcd *uhci)
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{
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unsigned long io_addr = uhci->io_addr;
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int i;
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if (to_pci_dev(uhci_dev(uhci))->vendor != PCI_VENDOR_ID_INTEL)
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return 1;
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/* Some of Intel's USB controllers have a bug that causes false
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* resume indications if any port has an over current condition.
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* To prevent problems, we will not allow a global suspend if
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* any ports are OC.
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*
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* Some motherboards using Intel's chipsets (but not using all
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* the USB ports) appear to hardwire the over current inputs active
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* to disable the USB ports.
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*/
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/* check for over current condition on any port */
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for (i = 0; i < uhci->rh_numports; i++) {
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if (inw(io_addr + USBPORTSC1 + i * 2) & USBPORTSC_OC)
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return 0;
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}
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return 1;
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}
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static void reset_hc(struct uhci_hcd *uhci)
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{
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unsigned long io_addr = uhci->io_addr;
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/* Turn off PIRQ, SMI, and all interrupts. This also turns off
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* the BIOS's USB Legacy Support.
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*/
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pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
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outw(0, uhci->io_addr + USBINTR);
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/* Global reset for 50ms */
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uhci->state = UHCI_RESET;
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outw(USBCMD_GRESET, io_addr + USBCMD);
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msleep(50);
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outw(0, io_addr + USBCMD);
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/* Another 10ms delay */
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msleep(10);
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uhci->resume_detect = 0;
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uhci->is_stopped = UHCI_IS_STOPPED;
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}
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static void suspend_hc(struct uhci_hcd *uhci)
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{
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unsigned long io_addr = uhci->io_addr;
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dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
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uhci->state = UHCI_SUSPENDED;
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uhci->resume_detect = 0;
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outw(USBCMD_EGSM, io_addr + USBCMD);
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/* FIXME: Wait for the controller to actually stop */
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uhci_get_current_frame_number(uhci);
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uhci->is_stopped = UHCI_IS_STOPPED;
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uhci_scan_schedule(uhci, NULL);
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}
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static void wakeup_hc(struct uhci_hcd *uhci)
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{
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unsigned long io_addr = uhci->io_addr;
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switch (uhci->state) {
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case UHCI_SUSPENDED: /* Start the resume */
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dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
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/* Global resume for >= 20ms */
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outw(USBCMD_FGR | USBCMD_EGSM, io_addr + USBCMD);
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uhci->state = UHCI_RESUMING_1;
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uhci->state_end = jiffies + msecs_to_jiffies(20);
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uhci->is_stopped = 0;
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break;
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case UHCI_RESUMING_1: /* End global resume */
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uhci->state = UHCI_RESUMING_2;
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outw(0, io_addr + USBCMD);
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/* Falls through */
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case UHCI_RESUMING_2: /* Wait for EOP to be sent */
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if (inw(io_addr + USBCMD) & USBCMD_FGR)
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break;
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/* Run for at least 1 second, and
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* mark it configured with a 64-byte max packet */
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uhci->state = UHCI_RUNNING_GRACE;
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uhci->state_end = jiffies + HZ;
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outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP,
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io_addr + USBCMD);
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break;
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case UHCI_RUNNING_GRACE: /* Now allowed to suspend */
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uhci->state = UHCI_RUNNING;
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break;
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default:
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break;
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}
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}
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static int start_hc(struct uhci_hcd *uhci)
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{
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unsigned long io_addr = uhci->io_addr;
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int timeout = 10;
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/*
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* Reset the HC - this will force us to get a
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* new notification of any already connected
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* ports due to the virtual disconnect that it
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* implies.
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*/
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outw(USBCMD_HCRESET, io_addr + USBCMD);
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while (inw(io_addr + USBCMD) & USBCMD_HCRESET) {
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if (--timeout < 0) {
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dev_err(uhci_dev(uhci), "USBCMD_HCRESET timed out!\n");
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return -ETIMEDOUT;
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}
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msleep(1);
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}
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/* Mark controller as running before we enable interrupts */
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uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
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/* Turn on PIRQ and all interrupts */
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pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
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USBLEGSUP_DEFAULT);
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outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
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io_addr + USBINTR);
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/* Start at frame 0 */
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outw(0, io_addr + USBFRNUM);
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outl(uhci->fl->dma_handle, io_addr + USBFLBASEADD);
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/* Run and mark it configured with a 64-byte max packet */
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uhci->state = UHCI_RUNNING_GRACE;
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uhci->state_end = jiffies + HZ;
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outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, io_addr + USBCMD);
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uhci->is_stopped = 0;
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return 0;
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}
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static void hc_state_transitions(struct uhci_hcd *uhci)
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{
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switch (uhci->state) {
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case UHCI_RUNNING:
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/* global suspend if nothing connected for 1 second */
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if (!ports_active(uhci) && suspend_allowed(uhci)) {
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uhci->state = UHCI_SUSPENDING_GRACE;
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uhci->state_end = jiffies + HZ;
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}
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break;
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case UHCI_SUSPENDING_GRACE:
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if (ports_active(uhci))
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uhci->state = UHCI_RUNNING;
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else if (time_after_eq(jiffies, uhci->state_end))
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suspend_hc(uhci);
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break;
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case UHCI_SUSPENDED:
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/* wakeup if requested by a device */
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if (uhci->resume_detect)
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wakeup_hc(uhci);
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break;
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case UHCI_RESUMING_1:
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case UHCI_RESUMING_2:
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case UHCI_RUNNING_GRACE:
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if (time_after_eq(jiffies, uhci->state_end))
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wakeup_hc(uhci);
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break;
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default:
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break;
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}
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}
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static int init_stall_timer(struct usb_hcd *hcd);
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static void stall_callback(unsigned long ptr)
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{
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struct usb_hcd *hcd = (struct usb_hcd *)ptr;
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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struct urb_priv *up;
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unsigned long flags;
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spin_lock_irqsave(&uhci->lock, flags);
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uhci_scan_schedule(uhci, NULL);
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list_for_each_entry(up, &uhci->urb_list, urb_list) {
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struct urb *u = up->urb;
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spin_lock(&u->lock);
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/* Check if the FSBR timed out */
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if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT))
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uhci_fsbr_timeout(uhci, u);
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spin_unlock(&u->lock);
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}
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/* Really disable FSBR */
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if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) {
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uhci->fsbrtimeout = 0;
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uhci->skel_term_qh->link = UHCI_PTR_TERM;
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}
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/* Poll for and perform state transitions */
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hc_state_transitions(uhci);
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if (unlikely(uhci->suspended_ports && uhci->state != UHCI_SUSPENDED))
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uhci_check_ports(uhci);
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init_stall_timer(hcd);
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spin_unlock_irqrestore(&uhci->lock, flags);
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}
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static int init_stall_timer(struct usb_hcd *hcd)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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init_timer(&uhci->stall_timer);
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uhci->stall_timer.function = stall_callback;
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uhci->stall_timer.data = (unsigned long)hcd;
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uhci->stall_timer.expires = jiffies + msecs_to_jiffies(100);
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add_timer(&uhci->stall_timer);
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return 0;
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}
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static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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unsigned long io_addr = uhci->io_addr;
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unsigned short status;
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/*
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* Read the interrupt status, and write it back to clear the
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* interrupt cause. Contrary to the UHCI specification, the
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* "HC Halted" status bit is persistent: it is RO, not R/WC.
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*/
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status = inw(io_addr + USBSTS);
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if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
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return IRQ_NONE;
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outw(status, io_addr + USBSTS); /* Clear it */
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if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
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if (status & USBSTS_HSE)
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dev_err(uhci_dev(uhci), "host system error, "
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"PCI problems?\n");
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if (status & USBSTS_HCPE)
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dev_err(uhci_dev(uhci), "host controller process "
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"error, something bad happened!\n");
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if ((status & USBSTS_HCH) && uhci->state > 0) {
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dev_err(uhci_dev(uhci), "host controller halted, "
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"very bad!\n");
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/* FIXME: Reset the controller, fix the offending TD */
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}
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}
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if (status & USBSTS_RD)
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uhci->resume_detect = 1;
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spin_lock(&uhci->lock);
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uhci_scan_schedule(uhci, regs);
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spin_unlock(&uhci->lock);
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return IRQ_HANDLED;
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}
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/*
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* Store the current frame number in uhci->frame_number if the controller
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* is runnning
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*/
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static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
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{
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if (!uhci->is_stopped)
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uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
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}
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/*
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* De-allocate all resources
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*/
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static void release_uhci(struct uhci_hcd *uhci)
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{
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int i;
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for (i = 0; i < UHCI_NUM_SKELQH; i++)
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if (uhci->skelqh[i]) {
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uhci_free_qh(uhci, uhci->skelqh[i]);
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uhci->skelqh[i] = NULL;
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}
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if (uhci->term_td) {
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uhci_free_td(uhci, uhci->term_td);
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uhci->term_td = NULL;
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}
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if (uhci->qh_pool) {
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dma_pool_destroy(uhci->qh_pool);
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uhci->qh_pool = NULL;
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}
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if (uhci->td_pool) {
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dma_pool_destroy(uhci->td_pool);
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uhci->td_pool = NULL;
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}
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if (uhci->fl) {
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dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
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uhci->fl, uhci->fl->dma_handle);
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uhci->fl = NULL;
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}
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if (uhci->dentry) {
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debugfs_remove(uhci->dentry);
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uhci->dentry = NULL;
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}
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}
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static int uhci_reset(struct usb_hcd *hcd)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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uhci->io_addr = (unsigned long) hcd->rsrc_start;
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/* Kick BIOS off this hardware and reset, so we won't get
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* interrupts from any previous setup.
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*/
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reset_hc(uhci);
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return 0;
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}
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/*
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* Allocate a frame list, and then setup the skeleton
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*
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* The hardware doesn't really know any difference
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* in the queues, but the order does matter for the
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* protocols higher up. The order is:
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*
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* - any isochronous events handled before any
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* of the queues. We don't do that here, because
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* we'll create the actual TD entries on demand.
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* - The first queue is the interrupt queue.
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* - The second queue is the control queue, split into low- and full-speed
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* - The third queue is bulk queue.
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* - The fourth queue is the bandwidth reclamation queue, which loops back
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* to the full-speed control queue.
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*/
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static int uhci_start(struct usb_hcd *hcd)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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int retval = -EBUSY;
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int i, port;
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unsigned io_size;
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dma_addr_t dma_handle;
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struct usb_device *udev;
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struct dentry *dentry;
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io_size = (unsigned) hcd->rsrc_len;
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dentry = debugfs_create_file(hcd->self.bus_name, S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, &uhci_debug_operations);
|
|
if (!dentry) {
|
|
dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
|
|
retval = -ENOMEM;
|
|
goto err_create_debug_entry;
|
|
}
|
|
uhci->dentry = dentry;
|
|
|
|
uhci->fsbr = 0;
|
|
uhci->fsbrtimeout = 0;
|
|
|
|
spin_lock_init(&uhci->lock);
|
|
INIT_LIST_HEAD(&uhci->qh_remove_list);
|
|
|
|
INIT_LIST_HEAD(&uhci->td_remove_list);
|
|
|
|
INIT_LIST_HEAD(&uhci->urb_remove_list);
|
|
|
|
INIT_LIST_HEAD(&uhci->urb_list);
|
|
|
|
INIT_LIST_HEAD(&uhci->complete_list);
|
|
|
|
init_waitqueue_head(&uhci->waitqh);
|
|
|
|
uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
|
|
&dma_handle, 0);
|
|
if (!uhci->fl) {
|
|
dev_err(uhci_dev(uhci), "unable to allocate "
|
|
"consistent memory for frame list\n");
|
|
goto err_alloc_fl;
|
|
}
|
|
|
|
memset((void *)uhci->fl, 0, sizeof(*uhci->fl));
|
|
|
|
uhci->fl->dma_handle = dma_handle;
|
|
|
|
uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
|
|
sizeof(struct uhci_td), 16, 0);
|
|
if (!uhci->td_pool) {
|
|
dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
|
|
goto err_create_td_pool;
|
|
}
|
|
|
|
uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
|
|
sizeof(struct uhci_qh), 16, 0);
|
|
if (!uhci->qh_pool) {
|
|
dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
|
|
goto err_create_qh_pool;
|
|
}
|
|
|
|
/* Initialize the root hub */
|
|
|
|
/* UHCI specs says devices must have 2 ports, but goes on to say */
|
|
/* they may have more but give no way to determine how many they */
|
|
/* have. However, according to the UHCI spec, Bit 7 is always set */
|
|
/* to 1. So we try to use this to our advantage */
|
|
for (port = 0; port < (io_size - 0x10) / 2; port++) {
|
|
unsigned int portstatus;
|
|
|
|
portstatus = inw(uhci->io_addr + 0x10 + (port * 2));
|
|
if (!(portstatus & 0x0080))
|
|
break;
|
|
}
|
|
if (debug)
|
|
dev_info(uhci_dev(uhci), "detected %d ports\n", port);
|
|
|
|
/* This is experimental so anything less than 2 or greater than 8 is */
|
|
/* something weird and we'll ignore it */
|
|
if (port < 2 || port > UHCI_RH_MAXCHILD) {
|
|
dev_info(uhci_dev(uhci), "port count misdetected? "
|
|
"forcing to 2 ports\n");
|
|
port = 2;
|
|
}
|
|
|
|
uhci->rh_numports = port;
|
|
|
|
udev = usb_alloc_dev(NULL, &hcd->self, 0);
|
|
if (!udev) {
|
|
dev_err(uhci_dev(uhci), "unable to allocate root hub\n");
|
|
goto err_alloc_root_hub;
|
|
}
|
|
|
|
uhci->term_td = uhci_alloc_td(uhci, udev);
|
|
if (!uhci->term_td) {
|
|
dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
|
|
goto err_alloc_term_td;
|
|
}
|
|
|
|
for (i = 0; i < UHCI_NUM_SKELQH; i++) {
|
|
uhci->skelqh[i] = uhci_alloc_qh(uhci, udev);
|
|
if (!uhci->skelqh[i]) {
|
|
dev_err(uhci_dev(uhci), "unable to allocate QH\n");
|
|
goto err_alloc_skelqh;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* 8 Interrupt queues; link all higher int queues to int1,
|
|
* then link int1 to control and control to bulk
|
|
*/
|
|
uhci->skel_int128_qh->link =
|
|
uhci->skel_int64_qh->link =
|
|
uhci->skel_int32_qh->link =
|
|
uhci->skel_int16_qh->link =
|
|
uhci->skel_int8_qh->link =
|
|
uhci->skel_int4_qh->link =
|
|
uhci->skel_int2_qh->link =
|
|
cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH;
|
|
uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH;
|
|
|
|
uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
|
|
uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH;
|
|
uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH;
|
|
|
|
/* This dummy TD is to work around a bug in Intel PIIX controllers */
|
|
uhci_fill_td(uhci->term_td, 0, (UHCI_NULL_DATA_SIZE << 21) |
|
|
(0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
|
|
uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
|
|
|
|
uhci->skel_term_qh->link = UHCI_PTR_TERM;
|
|
uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
|
|
|
|
/*
|
|
* Fill the frame list: make all entries point to the proper
|
|
* interrupt queue.
|
|
*
|
|
* The interrupt queues will be interleaved as evenly as possible.
|
|
* There's not much to be done about period-1 interrupts; they have
|
|
* to occur in every frame. But we can schedule period-2 interrupts
|
|
* in odd-numbered frames, period-4 interrupts in frames congruent
|
|
* to 2 (mod 4), and so on. This way each frame only has two
|
|
* interrupt QHs, which will help spread out bandwidth utilization.
|
|
*/
|
|
for (i = 0; i < UHCI_NUMFRAMES; i++) {
|
|
int irq;
|
|
|
|
/*
|
|
* ffs (Find First bit Set) does exactly what we need:
|
|
* 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6],
|
|
* 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc.
|
|
* ffs > 6 => not on any high-period queue, so use
|
|
* skel_int1_qh = skelqh[7].
|
|
* Add UHCI_NUMFRAMES to insure at least one bit is set.
|
|
*/
|
|
irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES);
|
|
if (irq < 0)
|
|
irq = 7;
|
|
|
|
/* Only place we don't use the frame list routines */
|
|
uhci->fl->frame[i] = UHCI_PTR_QH |
|
|
cpu_to_le32(uhci->skelqh[irq]->dma_handle);
|
|
}
|
|
|
|
/*
|
|
* Some architectures require a full mb() to enforce completion of
|
|
* the memory writes above before the I/O transfers in start_hc().
|
|
*/
|
|
mb();
|
|
if ((retval = start_hc(uhci)) != 0)
|
|
goto err_alloc_skelqh;
|
|
|
|
init_stall_timer(hcd);
|
|
|
|
udev->speed = USB_SPEED_FULL;
|
|
|
|
if (usb_hcd_register_root_hub(udev, hcd) != 0) {
|
|
dev_err(uhci_dev(uhci), "unable to start root hub\n");
|
|
retval = -ENOMEM;
|
|
goto err_start_root_hub;
|
|
}
|
|
|
|
return 0;
|
|
|
|
/*
|
|
* error exits:
|
|
*/
|
|
err_start_root_hub:
|
|
reset_hc(uhci);
|
|
|
|
del_timer_sync(&uhci->stall_timer);
|
|
|
|
err_alloc_skelqh:
|
|
for (i = 0; i < UHCI_NUM_SKELQH; i++)
|
|
if (uhci->skelqh[i]) {
|
|
uhci_free_qh(uhci, uhci->skelqh[i]);
|
|
uhci->skelqh[i] = NULL;
|
|
}
|
|
|
|
uhci_free_td(uhci, uhci->term_td);
|
|
uhci->term_td = NULL;
|
|
|
|
err_alloc_term_td:
|
|
usb_put_dev(udev);
|
|
|
|
err_alloc_root_hub:
|
|
dma_pool_destroy(uhci->qh_pool);
|
|
uhci->qh_pool = NULL;
|
|
|
|
err_create_qh_pool:
|
|
dma_pool_destroy(uhci->td_pool);
|
|
uhci->td_pool = NULL;
|
|
|
|
err_create_td_pool:
|
|
dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl),
|
|
uhci->fl, uhci->fl->dma_handle);
|
|
uhci->fl = NULL;
|
|
|
|
err_alloc_fl:
|
|
debugfs_remove(uhci->dentry);
|
|
uhci->dentry = NULL;
|
|
|
|
err_create_debug_entry:
|
|
return retval;
|
|
}
|
|
|
|
static void uhci_stop(struct usb_hcd *hcd)
|
|
{
|
|
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
|
|
|
|
del_timer_sync(&uhci->stall_timer);
|
|
reset_hc(uhci);
|
|
|
|
spin_lock_irq(&uhci->lock);
|
|
uhci_scan_schedule(uhci, NULL);
|
|
spin_unlock_irq(&uhci->lock);
|
|
|
|
release_uhci(uhci);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
|
|
{
|
|
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
|
|
|
|
spin_lock_irq(&uhci->lock);
|
|
|
|
/* Don't try to suspend broken motherboards, reset instead */
|
|
if (suspend_allowed(uhci))
|
|
suspend_hc(uhci);
|
|
else {
|
|
spin_unlock_irq(&uhci->lock);
|
|
reset_hc(uhci);
|
|
spin_lock_irq(&uhci->lock);
|
|
uhci_scan_schedule(uhci, NULL);
|
|
}
|
|
|
|
spin_unlock_irq(&uhci->lock);
|
|
return 0;
|
|
}
|
|
|
|
static int uhci_resume(struct usb_hcd *hcd)
|
|
{
|
|
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
|
|
int rc;
|
|
|
|
pci_set_master(to_pci_dev(uhci_dev(uhci)));
|
|
|
|
spin_lock_irq(&uhci->lock);
|
|
|
|
if (uhci->state == UHCI_SUSPENDED) {
|
|
|
|
/*
|
|
* Some systems don't maintain the UHCI register values
|
|
* during a PM suspend/resume cycle, so reinitialize
|
|
* the Frame Number, Framelist Base Address, Interrupt
|
|
* Enable, and Legacy Support registers.
|
|
*/
|
|
pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
|
|
0);
|
|
outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
|
|
outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD);
|
|
outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC |
|
|
USBINTR_SP, uhci->io_addr + USBINTR);
|
|
uhci->resume_detect = 1;
|
|
pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
|
|
USBLEGSUP_DEFAULT);
|
|
} else {
|
|
spin_unlock_irq(&uhci->lock);
|
|
reset_hc(uhci);
|
|
if ((rc = start_hc(uhci)) != 0)
|
|
return rc;
|
|
spin_lock_irq(&uhci->lock);
|
|
}
|
|
hcd->state = HC_STATE_RUNNING;
|
|
|
|
spin_unlock_irq(&uhci->lock);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
/* Wait until all the URBs for a particular device/endpoint are gone */
|
|
static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
|
|
struct usb_host_endpoint *ep)
|
|
{
|
|
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
|
|
|
|
wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list));
|
|
}
|
|
|
|
static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
|
|
{
|
|
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
|
|
int frame_number;
|
|
unsigned long flags;
|
|
|
|
/* Minimize latency by avoiding the spinlock */
|
|
local_irq_save(flags);
|
|
rmb();
|
|
frame_number = (uhci->is_stopped ? uhci->frame_number :
|
|
inw(uhci->io_addr + USBFRNUM));
|
|
local_irq_restore(flags);
|
|
return frame_number;
|
|
}
|
|
|
|
static const char hcd_name[] = "uhci_hcd";
|
|
|
|
static const struct hc_driver uhci_driver = {
|
|
.description = hcd_name,
|
|
.product_desc = "UHCI Host Controller",
|
|
.hcd_priv_size = sizeof(struct uhci_hcd),
|
|
|
|
/* Generic hardware linkage */
|
|
.irq = uhci_irq,
|
|
.flags = HCD_USB11,
|
|
|
|
/* Basic lifecycle operations */
|
|
.reset = uhci_reset,
|
|
.start = uhci_start,
|
|
#ifdef CONFIG_PM
|
|
.suspend = uhci_suspend,
|
|
.resume = uhci_resume,
|
|
#endif
|
|
.stop = uhci_stop,
|
|
|
|
.urb_enqueue = uhci_urb_enqueue,
|
|
.urb_dequeue = uhci_urb_dequeue,
|
|
|
|
.endpoint_disable = uhci_hcd_endpoint_disable,
|
|
.get_frame_number = uhci_hcd_get_frame_number,
|
|
|
|
.hub_status_data = uhci_hub_status_data,
|
|
.hub_control = uhci_hub_control,
|
|
};
|
|
|
|
static const struct pci_device_id uhci_pci_ids[] = { {
|
|
/* handle any USB UHCI controller */
|
|
PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0),
|
|
.driver_data = (unsigned long) &uhci_driver,
|
|
}, { /* end: all zeroes */ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
|
|
|
|
static struct pci_driver uhci_pci_driver = {
|
|
.name = (char *)hcd_name,
|
|
.id_table = uhci_pci_ids,
|
|
|
|
.probe = usb_hcd_pci_probe,
|
|
.remove = usb_hcd_pci_remove,
|
|
|
|
#ifdef CONFIG_PM
|
|
.suspend = usb_hcd_pci_suspend,
|
|
.resume = usb_hcd_pci_resume,
|
|
#endif /* PM */
|
|
};
|
|
|
|
static int __init uhci_hcd_init(void)
|
|
{
|
|
int retval = -ENOMEM;
|
|
|
|
printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
|
|
|
|
if (usb_disabled())
|
|
return -ENODEV;
|
|
|
|
if (debug) {
|
|
errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
|
|
if (!errbuf)
|
|
goto errbuf_failed;
|
|
}
|
|
|
|
uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
|
|
if (!uhci_debugfs_root)
|
|
goto debug_failed;
|
|
|
|
uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
|
|
sizeof(struct urb_priv), 0, 0, NULL, NULL);
|
|
if (!uhci_up_cachep)
|
|
goto up_failed;
|
|
|
|
retval = pci_register_driver(&uhci_pci_driver);
|
|
if (retval)
|
|
goto init_failed;
|
|
|
|
return 0;
|
|
|
|
init_failed:
|
|
if (kmem_cache_destroy(uhci_up_cachep))
|
|
warn("not all urb_priv's were freed!");
|
|
|
|
up_failed:
|
|
debugfs_remove(uhci_debugfs_root);
|
|
|
|
debug_failed:
|
|
kfree(errbuf);
|
|
|
|
errbuf_failed:
|
|
|
|
return retval;
|
|
}
|
|
|
|
static void __exit uhci_hcd_cleanup(void)
|
|
{
|
|
pci_unregister_driver(&uhci_pci_driver);
|
|
|
|
if (kmem_cache_destroy(uhci_up_cachep))
|
|
warn("not all urb_priv's were freed!");
|
|
|
|
debugfs_remove(uhci_debugfs_root);
|
|
kfree(errbuf);
|
|
}
|
|
|
|
module_init(uhci_hcd_init);
|
|
module_exit(uhci_hcd_cleanup);
|
|
|
|
MODULE_AUTHOR(DRIVER_AUTHOR);
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|
|
MODULE_LICENSE("GPL");
|