19d78a61be
For certain system configurations a 5 usec udelay before checking I/OAT DMA channel status is sometimes not sufficient, resulting in a false failure status and unnecessary freeing of channel resources. Conversely, for many configurations 5 usec is longer than necessary. Loop for up to 20 usec waiting for successful status before failing. Signed-off-by: Dimitri Sivanich <sivanich@sgi.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> |
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| .. | ||
| dca.c | ||
| dma.c | ||
| dma.h | ||
| dma_v2.c | ||
| dma_v2.h | ||
| dma_v3.c | ||
| hw.h | ||
| Makefile | ||
| pci.c | ||
| registers.h | ||