7d12e780e0
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead of passing regs around manually through all ~1800 interrupt handlers in the Linux kernel. The regs pointer is used in few places, but it potentially costs both stack space and code to pass it around. On the FRV arch, removing the regs parameter from all the genirq function results in a 20% speed up of the IRQ exit path (ie: from leaving timer_interrupt() to leaving do_IRQ()). Where appropriate, an arch may override the generic storage facility and do something different with the variable. On FRV, for instance, the address is maintained in GR28 at all times inside the kernel as part of general exception handling. Having looked over the code, it appears that the parameter may be handed down through up to twenty or so layers of functions. Consider a USB character device attached to a USB hub, attached to a USB controller that posts its interrupts through a cascaded auxiliary interrupt controller. A character device driver may want to pass regs to the sysrq handler through the input layer which adds another few layers of parameter passing. I've build this code with allyesconfig for x86_64 and i386. I've runtested the main part of the code on FRV and i386, though I can't test most of the drivers. I've also done partial conversion for powerpc and MIPS - these at least compile with minimal configurations. This will affect all archs. Mostly the changes should be relatively easy. Take do_IRQ(), store the regs pointer at the beginning, saving the old one: struct pt_regs *old_regs = set_irq_regs(regs); And put the old one back at the end: set_irq_regs(old_regs); Don't pass regs through to generic_handle_irq() or __do_IRQ(). In timer_interrupt(), this sort of change will be necessary: - update_process_times(user_mode(regs)); - profile_tick(CPU_PROFILING, regs); + update_process_times(user_mode(get_irq_regs())); + profile_tick(CPU_PROFILING); I'd like to move update_process_times()'s use of get_irq_regs() into itself, except that i386, alone of the archs, uses something other than user_mode(). Some notes on the interrupt handling in the drivers: (*) input_dev() is now gone entirely. The regs pointer is no longer stored in the input_dev struct. (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does something different depending on whether it's been supplied with a regs pointer or not. (*) Various IRQ handler function pointers have been moved to type irq_handler_t. Signed-Off-By: David Howells <dhowells@redhat.com> (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
277 lines
7.8 KiB
C
277 lines
7.8 KiB
C
/* $Id: nj_s.c,v 2.13.2.4 2004/01/16 01:53:48 keil Exp $
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*
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* This software may be used and distributed according to the terms
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* of the GNU General Public License, incorporated herein by reference.
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*
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*/
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#include <linux/init.h>
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#include "hisax.h"
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#include "isac.h"
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#include "isdnl1.h"
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/ppp_defs.h>
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#include "netjet.h"
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static const char *NETjet_S_revision = "$Revision: 2.13.2.4 $";
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static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off)
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{
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return(5);
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}
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static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value)
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{
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}
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static irqreturn_t
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netjet_s_interrupt(int intno, void *dev_id)
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{
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struct IsdnCardState *cs = dev_id;
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u_char val, s1val, s0val;
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u_long flags;
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spin_lock_irqsave(&cs->lock, flags);
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s1val = bytein(cs->hw.njet.base + NETJET_IRQSTAT1);
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if (!(s1val & NETJET_ISACIRQ)) {
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val = NETjet_ReadIC(cs, ISAC_ISTA);
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if (cs->debug & L1_DEB_ISAC)
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debugl1(cs, "tiger: i1 %x %x", s1val, val);
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if (val) {
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isac_interrupt(cs, val);
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NETjet_WriteIC(cs, ISAC_MASK, 0xFF);
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NETjet_WriteIC(cs, ISAC_MASK, 0x0);
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}
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s1val = 1;
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} else
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s1val = 0;
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/*
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* read/write stat0 is better, because lower IRQ rate
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* Note the IRQ is on for 125 us if a condition match
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* thats long on modern CPU and so the IRQ is reentered
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* all the time.
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*/
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s0val = bytein(cs->hw.njet.base + NETJET_IRQSTAT0);
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if ((s0val | s1val)==0) { // shared IRQ
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spin_unlock_irqrestore(&cs->lock, flags);
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return IRQ_NONE;
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}
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if (s0val)
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byteout(cs->hw.njet.base + NETJET_IRQSTAT0, s0val);
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/* start new code 13/07/00 GE */
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/* set bits in sval to indicate which page is free */
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if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
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inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
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/* the 2nd write page is free */
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s0val = 0x08;
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else /* the 1st write page is free */
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s0val = 0x04;
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if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
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inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
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/* the 2nd read page is free */
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s0val |= 0x02;
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else /* the 1st read page is free */
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s0val |= 0x01;
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if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
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{
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if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
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printk(KERN_WARNING "nj LOCK_ATOMIC s0val %x->%x\n",
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cs->hw.njet.last_is0, s0val);
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spin_unlock_irqrestore(&cs->lock, flags);
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return IRQ_HANDLED;
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}
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cs->hw.njet.irqstat0 = s0val;
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if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
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(cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
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/* we have a read dma int */
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read_tiger(cs);
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if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
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(cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
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/* we have a write dma int */
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write_tiger(cs);
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/* end new code 13/07/00 GE */
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test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
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}
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spin_unlock_irqrestore(&cs->lock, flags);
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return IRQ_HANDLED;
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}
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static void
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reset_netjet_s(struct IsdnCardState *cs)
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{
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cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
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byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
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mdelay(10);
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/* now edge triggered for TJ320 GE 13/07/00 */
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/* see comment in IRQ function */
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if (cs->subtyp) /* TJ320 */
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cs->hw.njet.ctrl_reg = 0x40; /* Reset Off and status read clear */
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else
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cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */
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byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
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mdelay(10);
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cs->hw.njet.auxd = 0;
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cs->hw.njet.dmactrl = 0;
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byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
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byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
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byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
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}
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static int
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NETjet_S_card_msg(struct IsdnCardState *cs, int mt, void *arg)
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{
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u_long flags;
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switch (mt) {
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case CARD_RESET:
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spin_lock_irqsave(&cs->lock, flags);
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reset_netjet_s(cs);
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spin_unlock_irqrestore(&cs->lock, flags);
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return(0);
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case CARD_RELEASE:
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release_io_netjet(cs);
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return(0);
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case CARD_INIT:
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reset_netjet_s(cs);
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inittiger(cs);
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spin_lock_irqsave(&cs->lock, flags);
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clear_pending_isac_ints(cs);
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initisac(cs);
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/* Reenable all IRQ */
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cs->writeisac(cs, ISAC_MASK, 0);
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spin_unlock_irqrestore(&cs->lock, flags);
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return(0);
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case CARD_TEST:
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return(0);
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}
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return(0);
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}
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static struct pci_dev *dev_netjet __devinitdata = NULL;
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int __devinit
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setup_netjet_s(struct IsdnCard *card)
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{
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int bytecnt,cfg;
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struct IsdnCardState *cs = card->cs;
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char tmp[64];
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#ifdef __BIG_ENDIAN
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#error "not running on big endian machines now"
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#endif
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strcpy(tmp, NETjet_S_revision);
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printk(KERN_INFO "HiSax: Traverse Tech. NETjet-S driver Rev. %s\n", HiSax_getrev(tmp));
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if (cs->typ != ISDN_CTYPE_NETJET_S)
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return(0);
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test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
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#ifdef CONFIG_PCI
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for ( ;; )
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{
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if ((dev_netjet = pci_find_device(PCI_VENDOR_ID_TIGERJET,
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PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
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if (pci_enable_device(dev_netjet))
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return(0);
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pci_set_master(dev_netjet);
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cs->irq = dev_netjet->irq;
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if (!cs->irq) {
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printk(KERN_WARNING "NETjet-S: No IRQ for PCI card found\n");
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return(0);
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}
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cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
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if (!cs->hw.njet.base) {
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printk(KERN_WARNING "NETjet-S: No IO-Adr for PCI card found\n");
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return(0);
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}
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/* the TJ300 and TJ320 must be detected, the IRQ handling is different
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* unfortunatly the chips use the same device ID, but the TJ320 has
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* the bit20 in status PCI cfg register set
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*/
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pci_read_config_dword(dev_netjet, 0x04, &cfg);
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if (cfg & 0x00100000)
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cs->subtyp = 1; /* TJ320 */
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else
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cs->subtyp = 0; /* TJ300 */
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/* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG www.formula-n.com */
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if ((dev_netjet->subsystem_vendor == 0x55) &&
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(dev_netjet->subsystem_device == 0x02)) {
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printk(KERN_WARNING "Netjet: You tried to load this driver with an incompatible TigerJet-card\n");
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printk(KERN_WARNING "Use type=41 for Formula-n enter:now ISDN PCI and compatible\n");
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return(0);
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}
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/* end new code */
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} else {
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printk(KERN_WARNING "NETjet-S: No PCI card found\n");
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return(0);
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}
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cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
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cs->hw.njet.isac = cs->hw.njet.base | NETJET_ISAC_OFF;
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cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
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byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
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mdelay(10);
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cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */
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byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
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mdelay(10);
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cs->hw.njet.auxd = 0xC0;
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cs->hw.njet.dmactrl = 0;
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byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
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byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
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byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
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switch ( ( ( NETjet_ReadIC( cs, ISAC_RBCH ) >> 5 ) & 3 ) )
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{
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case 0 :
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break;
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case 3 :
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printk( KERN_WARNING "NETjet-S: NETspider-U PCI card found\n" );
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continue;
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default :
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printk( KERN_WARNING "NETjet-S: No PCI card found\n" );
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return 0;
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}
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break;
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}
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#else
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printk(KERN_WARNING "NETjet-S: NO_PCI_BIOS\n");
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printk(KERN_WARNING "NETjet-S: unable to config NETJET-S PCI\n");
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return (0);
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#endif /* CONFIG_PCI */
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bytecnt = 256;
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printk(KERN_INFO
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"NETjet-S: %s card configured at %#lx IRQ %d\n",
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cs->subtyp ? "TJ320" : "TJ300", cs->hw.njet.base, cs->irq);
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if (!request_region(cs->hw.njet.base, bytecnt, "netjet-s isdn")) {
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printk(KERN_WARNING
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"HiSax: %s config port %#lx-%#lx already in use\n",
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CardType[card->typ],
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cs->hw.njet.base,
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cs->hw.njet.base + bytecnt);
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return (0);
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}
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cs->readisac = &NETjet_ReadIC;
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cs->writeisac = &NETjet_WriteIC;
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cs->readisacfifo = &NETjet_ReadICfifo;
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cs->writeisacfifo = &NETjet_WriteICfifo;
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cs->BC_Read_Reg = &dummyrr;
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cs->BC_Write_Reg = &dummywr;
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cs->BC_Send_Data = &netjet_fill_dma;
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setup_isac(cs);
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cs->cardmsg = &NETjet_S_card_msg;
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cs->irq_func = &netjet_s_interrupt;
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cs->irq_flags |= IRQF_SHARED;
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ISACVersion(cs, "NETjet-S:");
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return (1);
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}
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