680 lines
26 KiB
C
680 lines
26 KiB
C
/*
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* pci.h
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*
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* PCI defines and function prototypes
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* Copyright 1994, Drew Eckhardt
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* Copyright 1997--1999 Martin Mares <mj@ucw.cz>
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*
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* For more information, please consult the following manuals (look at
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* http://www.pcisig.com/ for how to get them):
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*
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* PCI BIOS Specification
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* PCI Local Bus Specification
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* PCI to PCI Bridge Specification
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* PCI System Design Guide
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*/
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#ifndef LINUX_PCI_H
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#define LINUX_PCI_H
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#include <linux/mod_devicetable.h>
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/* Include the pci register defines */
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#include <linux/pci_regs.h>
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/* Include the ID list */
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#include <linux/pci_ids.h>
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/*
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* The PCI interface treats multi-function devices as independent
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* devices. The slot/function address of each device is encoded
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* in a single byte as follows:
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*
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* 7:3 = slot
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* 2:0 = function
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*/
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#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
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#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
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#define PCI_FUNC(devfn) ((devfn) & 0x07)
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/* Ioctls for /proc/bus/pci/X/Y nodes. */
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#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
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#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
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#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
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#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
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#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <linux/config.h>
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#include <linux/ioport.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/device.h>
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/* File state for mmap()s on /proc/bus/pci/X/Y */
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enum pci_mmap_state {
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pci_mmap_io,
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pci_mmap_mem
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};
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/* This defines the direction arg to the DMA mapping routines. */
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#define PCI_DMA_BIDIRECTIONAL 0
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#define PCI_DMA_TODEVICE 1
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#define PCI_DMA_FROMDEVICE 2
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#define PCI_DMA_NONE 3
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#define DEVICE_COUNT_COMPATIBLE 4
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#define DEVICE_COUNT_RESOURCE 12
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typedef int __bitwise pci_power_t;
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#define PCI_D0 ((pci_power_t __force) 0)
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#define PCI_D1 ((pci_power_t __force) 1)
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#define PCI_D2 ((pci_power_t __force) 2)
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#define PCI_D3hot ((pci_power_t __force) 3)
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#define PCI_D3cold ((pci_power_t __force) 4)
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#define PCI_UNKNOWN ((pci_power_t __force) 5)
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#define PCI_POWER_ERROR ((pci_power_t __force) -1)
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/*
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* The pci_dev structure is used to describe PCI devices.
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*/
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struct pci_dev {
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struct list_head global_list; /* node in list of all PCI devices */
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struct list_head bus_list; /* node in per-bus list */
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struct pci_bus *bus; /* bus this device is on */
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struct pci_bus *subordinate; /* bus this device bridges to */
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void *sysdata; /* hook for sys-specific extension */
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struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
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unsigned int devfn; /* encoded device & function index */
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unsigned short vendor;
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unsigned short device;
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unsigned short subsystem_vendor;
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unsigned short subsystem_device;
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unsigned int class; /* 3 bytes: (base,sub,prog-if) */
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u8 hdr_type; /* PCI header type (`multi' flag masked out) */
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u8 rom_base_reg; /* which config register controls the ROM */
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struct pci_driver *driver; /* which driver has allocated this device */
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u64 dma_mask; /* Mask of the bits of bus address this
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device implements. Normally this is
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0xffffffff. You only need to change
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this if your device has broken DMA
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or supports 64-bit transfers. */
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pci_power_t current_state; /* Current operating state. In ACPI-speak,
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this is D0-D3, D0 being fully functional,
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and D3 being off. */
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struct device dev; /* Generic device interface */
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/* device is compatible with these IDs */
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unsigned short vendor_compatible[DEVICE_COUNT_COMPATIBLE];
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unsigned short device_compatible[DEVICE_COUNT_COMPATIBLE];
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int cfg_size; /* Size of configuration space */
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/*
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* Instead of touching interrupt line and base address registers
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* directly, use the values stored here. They might be different!
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*/
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unsigned int irq;
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struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
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/* These fields are used by common fixups */
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unsigned int transparent:1; /* Transparent PCI bridge */
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unsigned int multifunction:1;/* Part of multi-function device */
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/* keep track of device state */
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unsigned int is_enabled:1; /* pci_enable_device has been called */
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unsigned int is_busmaster:1; /* device is busmaster */
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unsigned int no_msi:1; /* device may not use msi */
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unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
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u32 saved_config_space[16]; /* config space saved at suspend time */
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struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
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int rom_attr_enabled; /* has display of the rom attribute been enabled? */
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struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
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};
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#define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
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#define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
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#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
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#define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
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/*
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* For PCI devices, the region numbers are assigned this way:
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*
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* 0-5 standard PCI regions
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* 6 expansion ROM
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* 7-10 bridges: address space assigned to buses behind the bridge
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*/
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#define PCI_ROM_RESOURCE 6
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#define PCI_BRIDGE_RESOURCES 7
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#define PCI_NUM_RESOURCES 11
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#ifndef PCI_BUS_NUM_RESOURCES
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#define PCI_BUS_NUM_RESOURCES 8
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#endif
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#define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
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struct pci_bus {
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struct list_head node; /* node in list of buses */
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struct pci_bus *parent; /* parent bus this bridge is on */
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struct list_head children; /* list of child buses */
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struct list_head devices; /* list of devices on this bus */
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struct pci_dev *self; /* bridge device as seen by parent */
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struct resource *resource[PCI_BUS_NUM_RESOURCES];
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/* address space routed to this bus */
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struct pci_ops *ops; /* configuration access functions */
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void *sysdata; /* hook for sys-specific extension */
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struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
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unsigned char number; /* bus number */
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unsigned char primary; /* number of primary bridge */
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unsigned char secondary; /* number of secondary bridge */
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unsigned char subordinate; /* max number of subordinate buses */
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char name[48];
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unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
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unsigned short pad2;
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struct device *bridge;
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struct class_device class_dev;
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struct bin_attribute *legacy_io; /* legacy I/O for this bus */
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struct bin_attribute *legacy_mem; /* legacy mem */
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};
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#define pci_bus_b(n) list_entry(n, struct pci_bus, node)
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#define to_pci_bus(n) container_of(n, struct pci_bus, class_dev)
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/*
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* Error values that may be returned by PCI functions.
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*/
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#define PCIBIOS_SUCCESSFUL 0x00
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#define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
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#define PCIBIOS_BAD_VENDOR_ID 0x83
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#define PCIBIOS_DEVICE_NOT_FOUND 0x86
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#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
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#define PCIBIOS_SET_FAILED 0x88
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#define PCIBIOS_BUFFER_TOO_SMALL 0x89
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/* Low-level architecture-dependent routines */
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struct pci_ops {
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int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
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int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
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};
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struct pci_raw_ops {
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int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 *val);
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int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 val);
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};
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extern struct pci_raw_ops *raw_pci_ops;
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struct pci_bus_region {
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unsigned long start;
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unsigned long end;
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};
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struct pci_dynids {
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spinlock_t lock; /* protects list, index */
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struct list_head list; /* for IDs added at runtime */
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unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
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};
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struct module;
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struct pci_driver {
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struct list_head node;
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char *name;
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const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
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int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
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void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
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int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
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int (*resume) (struct pci_dev *dev); /* Device woken up */
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int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */
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void (*shutdown) (struct pci_dev *dev);
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struct device_driver driver;
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struct pci_dynids dynids;
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};
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#define to_pci_driver(drv) container_of(drv,struct pci_driver, driver)
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/**
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* PCI_DEVICE - macro used to describe a specific pci device
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* @vend: the 16 bit PCI Vendor ID
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* @dev: the 16 bit PCI Device ID
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*
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* This macro is used to create a struct pci_device_id that matches a
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* specific device. The subvendor and subdevice fields will be set to
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* PCI_ANY_ID.
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*/
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#define PCI_DEVICE(vend,dev) \
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.vendor = (vend), .device = (dev), \
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.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
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/**
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* PCI_DEVICE_CLASS - macro used to describe a specific pci device class
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* @dev_class: the class, subclass, prog-if triple for this device
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* @dev_class_mask: the class mask for this device
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*
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* This macro is used to create a struct pci_device_id that matches a
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* specific PCI class. The vendor, device, subvendor, and subdevice
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* fields will be set to PCI_ANY_ID.
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*/
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#define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
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.class = (dev_class), .class_mask = (dev_class_mask), \
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.vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
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.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
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/*
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* pci_module_init is obsolete, this stays here till we fix up all usages of it
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* in the tree.
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*/
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#define pci_module_init pci_register_driver
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/* these external functions are only available when PCI support is enabled */
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#ifdef CONFIG_PCI
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extern struct bus_type pci_bus_type;
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/* Do NOT directly access these two variables, unless you are arch specific pci
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* code, or pci core code. */
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extern struct list_head pci_root_buses; /* list of all known PCI buses */
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extern struct list_head pci_devices; /* list of all devices */
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void pcibios_fixup_bus(struct pci_bus *);
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int pcibios_enable_device(struct pci_dev *, int mask);
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char *pcibios_setup (char *str);
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/* Used only when drivers/pci/setup.c is used */
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void pcibios_align_resource(void *, struct resource *,
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unsigned long, unsigned long);
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void pcibios_update_irq(struct pci_dev *, int irq);
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/* Generic PCI functions used internally */
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extern struct pci_bus *pci_find_bus(int domain, int busnr);
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void pci_bus_add_devices(struct pci_bus *bus);
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struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
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static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata)
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{
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struct pci_bus *root_bus;
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root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
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if (root_bus)
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pci_bus_add_devices(root_bus);
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return root_bus;
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}
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struct pci_bus *pci_create_bus(struct device *parent, int bus, struct pci_ops *ops, void *sysdata);
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struct pci_bus * pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, int busnr);
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int pci_scan_slot(struct pci_bus *bus, int devfn);
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struct pci_dev * pci_scan_single_device(struct pci_bus *bus, int devfn);
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void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
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unsigned int pci_scan_child_bus(struct pci_bus *bus);
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void pci_bus_add_device(struct pci_dev *dev);
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void pci_read_bridge_bases(struct pci_bus *child);
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struct resource *pci_find_parent_resource(const struct pci_dev *dev, struct resource *res);
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int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
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extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
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extern void pci_dev_put(struct pci_dev *dev);
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extern void pci_remove_bus(struct pci_bus *b);
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extern void pci_remove_bus_device(struct pci_dev *dev);
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void pci_setup_cardbus(struct pci_bus *bus);
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/* Generic PCI functions exported to card drivers */
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struct pci_dev *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from);
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struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int device, const struct pci_dev *from);
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struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
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int pci_find_capability (struct pci_dev *dev, int cap);
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int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
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int pci_find_ext_capability (struct pci_dev *dev, int cap);
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struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
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struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
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struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
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unsigned int ss_vendor, unsigned int ss_device,
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struct pci_dev *from);
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struct pci_dev *pci_get_slot (struct pci_bus *bus, unsigned int devfn);
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struct pci_dev *pci_get_class (unsigned int class, struct pci_dev *from);
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int pci_dev_present(const struct pci_device_id *ids);
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int pci_bus_read_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 *val);
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int pci_bus_read_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 *val);
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int pci_bus_read_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 *val);
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int pci_bus_write_config_byte (struct pci_bus *bus, unsigned int devfn, int where, u8 val);
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int pci_bus_write_config_word (struct pci_bus *bus, unsigned int devfn, int where, u16 val);
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int pci_bus_write_config_dword (struct pci_bus *bus, unsigned int devfn, int where, u32 val);
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static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
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{
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return pci_bus_read_config_byte (dev->bus, dev->devfn, where, val);
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}
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static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
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{
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return pci_bus_read_config_word (dev->bus, dev->devfn, where, val);
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}
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static inline int pci_read_config_dword(struct pci_dev *dev, int where, u32 *val)
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{
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return pci_bus_read_config_dword (dev->bus, dev->devfn, where, val);
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}
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static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
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{
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return pci_bus_write_config_byte (dev->bus, dev->devfn, where, val);
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}
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static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
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{
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return pci_bus_write_config_word (dev->bus, dev->devfn, where, val);
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}
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static inline int pci_write_config_dword(struct pci_dev *dev, int where, u32 val)
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{
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return pci_bus_write_config_dword (dev->bus, dev->devfn, where, val);
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}
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int pci_enable_device(struct pci_dev *dev);
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int pci_enable_device_bars(struct pci_dev *dev, int mask);
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void pci_disable_device(struct pci_dev *dev);
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void pci_set_master(struct pci_dev *dev);
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#define HAVE_PCI_SET_MWI
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int pci_set_mwi(struct pci_dev *dev);
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void pci_clear_mwi(struct pci_dev *dev);
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void pci_intx(struct pci_dev *dev, int enable);
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int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
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int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
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void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
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int pci_assign_resource(struct pci_dev *dev, int i);
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void pci_restore_bars(struct pci_dev *dev);
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/* ROM control related routines */
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void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
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void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size);
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void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
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void pci_remove_rom(struct pci_dev *pdev);
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/* Power management related routines */
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int pci_save_state(struct pci_dev *dev);
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int pci_restore_state(struct pci_dev *dev);
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int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
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pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
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int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
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/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
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void pci_bus_assign_resources(struct pci_bus *bus);
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void pci_bus_size_bridges(struct pci_bus *bus);
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int pci_claim_resource(struct pci_dev *, int);
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void pci_assign_unassigned_resources(void);
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void pdev_enable_device(struct pci_dev *);
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void pdev_sort_resources(struct pci_dev *, struct resource_list *);
|
|
void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
|
|
int (*)(struct pci_dev *, u8, u8));
|
|
#define HAVE_PCI_REQ_REGIONS 2
|
|
int pci_request_regions(struct pci_dev *, char *);
|
|
void pci_release_regions(struct pci_dev *);
|
|
int pci_request_region(struct pci_dev *, int, char *);
|
|
void pci_release_region(struct pci_dev *, int);
|
|
|
|
/* drivers/pci/bus.c */
|
|
int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
|
|
unsigned long size, unsigned long align,
|
|
unsigned long min, unsigned int type_mask,
|
|
void (*alignf)(void *, struct resource *,
|
|
unsigned long, unsigned long),
|
|
void *alignf_data);
|
|
void pci_enable_bridges(struct pci_bus *bus);
|
|
|
|
/* Proper probing supporting hot-pluggable devices */
|
|
int __pci_register_driver(struct pci_driver *, struct module *);
|
|
static inline int pci_register_driver(struct pci_driver *driver)
|
|
{
|
|
return __pci_register_driver(driver, THIS_MODULE);
|
|
}
|
|
|
|
void pci_unregister_driver(struct pci_driver *);
|
|
void pci_remove_behind_bridge(struct pci_dev *);
|
|
struct pci_driver *pci_dev_driver(const struct pci_dev *);
|
|
const struct pci_device_id *pci_match_device(struct pci_driver *drv, struct pci_dev *dev);
|
|
const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, struct pci_dev *dev);
|
|
int pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass);
|
|
|
|
void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
|
|
void *userdata);
|
|
|
|
/* kmem_cache style wrapper around pci_alloc_consistent() */
|
|
|
|
#include <linux/dmapool.h>
|
|
|
|
#define pci_pool dma_pool
|
|
#define pci_pool_create(name, pdev, size, align, allocation) \
|
|
dma_pool_create(name, &pdev->dev, size, align, allocation)
|
|
#define pci_pool_destroy(pool) dma_pool_destroy(pool)
|
|
#define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
|
|
#define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
|
|
|
|
enum pci_dma_burst_strategy {
|
|
PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
|
|
strategy_parameter is N/A */
|
|
PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
|
|
byte boundaries */
|
|
PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
|
|
strategy_parameter byte boundaries */
|
|
};
|
|
|
|
#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
|
|
extern struct pci_dev *isa_bridge;
|
|
#endif
|
|
|
|
struct msix_entry {
|
|
u16 vector; /* kernel uses to write allocated vector */
|
|
u16 entry; /* driver uses to specify entry, OS writes */
|
|
};
|
|
|
|
#ifndef CONFIG_PCI_MSI
|
|
static inline void pci_scan_msi_device(struct pci_dev *dev) {}
|
|
static inline int pci_enable_msi(struct pci_dev *dev) {return -1;}
|
|
static inline void pci_disable_msi(struct pci_dev *dev) {}
|
|
static inline int pci_enable_msix(struct pci_dev* dev,
|
|
struct msix_entry *entries, int nvec) {return -1;}
|
|
static inline void pci_disable_msix(struct pci_dev *dev) {}
|
|
static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
|
|
#else
|
|
extern void pci_scan_msi_device(struct pci_dev *dev);
|
|
extern int pci_enable_msi(struct pci_dev *dev);
|
|
extern void pci_disable_msi(struct pci_dev *dev);
|
|
extern int pci_enable_msix(struct pci_dev* dev,
|
|
struct msix_entry *entries, int nvec);
|
|
extern void pci_disable_msix(struct pci_dev *dev);
|
|
extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
|
|
#endif
|
|
|
|
extern void pci_block_user_cfg_access(struct pci_dev *dev);
|
|
extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
|
|
|
|
/*
|
|
* PCI domain support. Sometimes called PCI segment (eg by ACPI),
|
|
* a PCI domain is defined to be a set of PCI busses which share
|
|
* configuration space.
|
|
*/
|
|
#ifndef CONFIG_PCI_DOMAINS
|
|
static inline int pci_domain_nr(struct pci_bus *bus) { return 0; }
|
|
static inline int pci_proc_domain(struct pci_bus *bus)
|
|
{
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#else /* CONFIG_PCI is not enabled */
|
|
|
|
/*
|
|
* If the system does not have PCI, clearly these return errors. Define
|
|
* these as simple inline functions to avoid hair in drivers.
|
|
*/
|
|
|
|
#define _PCI_NOP(o,s,t) \
|
|
static inline int pci_##o##_config_##s (struct pci_dev *dev, int where, t val) \
|
|
{ return PCIBIOS_FUNC_NOT_SUPPORTED; }
|
|
#define _PCI_NOP_ALL(o,x) _PCI_NOP(o,byte,u8 x) \
|
|
_PCI_NOP(o,word,u16 x) \
|
|
_PCI_NOP(o,dword,u32 x)
|
|
_PCI_NOP_ALL(read, *)
|
|
_PCI_NOP_ALL(write,)
|
|
|
|
static inline struct pci_dev *pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from)
|
|
{ return NULL; }
|
|
|
|
static inline struct pci_dev *pci_find_slot(unsigned int bus, unsigned int devfn)
|
|
{ return NULL; }
|
|
|
|
static inline struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from)
|
|
{ return NULL; }
|
|
|
|
static inline struct pci_dev *pci_get_subsys (unsigned int vendor, unsigned int device,
|
|
unsigned int ss_vendor, unsigned int ss_device, struct pci_dev *from)
|
|
{ return NULL; }
|
|
|
|
static inline struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from)
|
|
{ return NULL; }
|
|
|
|
#define pci_dev_present(ids) (0)
|
|
#define pci_dev_put(dev) do { } while (0)
|
|
|
|
static inline void pci_set_master(struct pci_dev *dev) { }
|
|
static inline int pci_enable_device(struct pci_dev *dev) { return -EIO; }
|
|
static inline void pci_disable_device(struct pci_dev *dev) { }
|
|
static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) { return -EIO; }
|
|
static inline int pci_assign_resource(struct pci_dev *dev, int i) { return -EBUSY;}
|
|
static inline int __pci_register_driver(struct pci_driver *drv, struct module *owner) { return 0;}
|
|
static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
|
|
static inline void pci_unregister_driver(struct pci_driver *drv) { }
|
|
static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
|
|
static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
|
|
static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
|
|
static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
|
|
|
|
/* Power management related routines */
|
|
static inline int pci_save_state(struct pci_dev *dev) { return 0; }
|
|
static inline int pci_restore_state(struct pci_dev *dev) { return 0; }
|
|
static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) { return 0; }
|
|
static inline pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) { return PCI_D0; }
|
|
static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable) { return 0; }
|
|
|
|
#define isa_bridge ((struct pci_dev *)NULL)
|
|
|
|
#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
|
|
|
|
static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
|
|
static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
|
|
|
|
#endif /* CONFIG_PCI */
|
|
|
|
/* Include architecture-dependent settings and functions */
|
|
|
|
#include <asm/pci.h>
|
|
|
|
/* these helpers provide future and backwards compatibility
|
|
* for accessing popular PCI BAR info */
|
|
#define pci_resource_start(dev,bar) ((dev)->resource[(bar)].start)
|
|
#define pci_resource_end(dev,bar) ((dev)->resource[(bar)].end)
|
|
#define pci_resource_flags(dev,bar) ((dev)->resource[(bar)].flags)
|
|
#define pci_resource_len(dev,bar) \
|
|
((pci_resource_start((dev),(bar)) == 0 && \
|
|
pci_resource_end((dev),(bar)) == \
|
|
pci_resource_start((dev),(bar))) ? 0 : \
|
|
\
|
|
(pci_resource_end((dev),(bar)) - \
|
|
pci_resource_start((dev),(bar)) + 1))
|
|
|
|
/* Similar to the helpers above, these manipulate per-pci_dev
|
|
* driver-specific data. They are really just a wrapper around
|
|
* the generic device structure functions of these calls.
|
|
*/
|
|
static inline void *pci_get_drvdata (struct pci_dev *pdev)
|
|
{
|
|
return dev_get_drvdata(&pdev->dev);
|
|
}
|
|
|
|
static inline void pci_set_drvdata (struct pci_dev *pdev, void *data)
|
|
{
|
|
dev_set_drvdata(&pdev->dev, data);
|
|
}
|
|
|
|
/* If you want to know what to call your pci_dev, ask this function.
|
|
* Again, it's a wrapper around the generic device.
|
|
*/
|
|
static inline char *pci_name(struct pci_dev *pdev)
|
|
{
|
|
return pdev->dev.bus_id;
|
|
}
|
|
|
|
|
|
/* Some archs don't want to expose struct resource to userland as-is
|
|
* in sysfs and /proc
|
|
*/
|
|
#ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
|
|
static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
|
|
const struct resource *rsrc, u64 *start, u64 *end)
|
|
{
|
|
*start = rsrc->start;
|
|
*end = rsrc->end;
|
|
}
|
|
#endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
|
|
|
|
|
|
/*
|
|
* The world is not perfect and supplies us with broken PCI devices.
|
|
* For at least a part of these bugs we need a work-around, so both
|
|
* generic (drivers/pci/quirks.c) and per-architecture code can define
|
|
* fixup hooks to be called for particular buggy devices.
|
|
*/
|
|
|
|
struct pci_fixup {
|
|
u16 vendor, device; /* You can use PCI_ANY_ID here of course */
|
|
void (*hook)(struct pci_dev *dev);
|
|
};
|
|
|
|
enum pci_fixup_pass {
|
|
pci_fixup_early, /* Before probing BARs */
|
|
pci_fixup_header, /* After reading configuration header */
|
|
pci_fixup_final, /* Final phase of device fixups */
|
|
pci_fixup_enable, /* pci_enable_device() time */
|
|
};
|
|
|
|
/* Anonymous variables would be nice... */
|
|
#define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
|
|
static const struct pci_fixup __pci_fixup_##name __attribute_used__ \
|
|
__attribute__((__section__(#section))) = { vendor, device, hook };
|
|
#define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
|
|
DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
|
|
vendor##device##hook, vendor, device, hook)
|
|
#define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
|
|
DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
|
|
vendor##device##hook, vendor, device, hook)
|
|
#define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
|
|
DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
|
|
vendor##device##hook, vendor, device, hook)
|
|
#define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
|
|
DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
|
|
vendor##device##hook, vendor, device, hook)
|
|
|
|
|
|
void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
|
|
|
|
extern int pci_pci_problems;
|
|
#define PCIPCI_FAIL 1
|
|
#define PCIPCI_TRITON 2
|
|
#define PCIPCI_NATOMA 4
|
|
#define PCIPCI_VIAETBF 8
|
|
#define PCIPCI_VSFX 16
|
|
#define PCIPCI_ALIMAGIK 32
|
|
|
|
#endif /* __KERNEL__ */
|
|
#endif /* LINUX_PCI_H */
|