5cbad0ebf4
This patch adds the ARCH=arm specific a kgdb backend, originally written by Deepak Saxena <dsaxena@plexity.net> and George Davis <gdavis@mvista.com>. Geoff Levand <geoffrey.levand@am.sony.com>, Nicolas Pitre, Manish Lachwani, and Jason Wessel have contributed various fixups here as well. The KGDB patch makes one change to the core ARM architecture such that the traps are initialized early for use with the debugger or other subsystems. [ mingo@elte.hu: small cleanups. ] [ ben-linux@fluff.org: fixed early_trap_init ] Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Acked-by: Deepak Saxena <dsaxena@plexity.net>
104 lines
2.6 KiB
C
104 lines
2.6 KiB
C
/*
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* ARM KGDB support
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*
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* Author: Deepak Saxena <dsaxena@mvista.com>
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*
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* Copyright (C) 2002 MontaVista Software Inc.
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*
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*/
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#ifndef __ARM_KGDB_H__
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#define __ARM_KGDB_H__
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#include <linux/ptrace.h>
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/*
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* GDB assumes that we're a user process being debugged, so
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* it will send us an SWI command to write into memory as the
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* debug trap. When an SWI occurs, the next instruction addr is
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* placed into R14_svc before jumping to the vector trap.
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* This doesn't work for kernel debugging as we are already in SVC
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* we would loose the kernel's LR, which is a bad thing. This
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* is bad thing.
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*
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* By doing this as an undefined instruction trap, we force a mode
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* switch from SVC to UND mode, allowing us to save full kernel state.
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*
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* We also define a KGDB_COMPILED_BREAK which can be used to compile
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* in breakpoints. This is important for things like sysrq-G and for
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* the initial breakpoint from trap_init().
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*
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* Note to ARM HW designers: Add real trap support like SH && PPC to
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* make our lives much much simpler. :)
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*/
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#define BREAK_INSTR_SIZE 4
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#define GDB_BREAKINST 0xef9f0001
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#define KGDB_BREAKINST 0xe7ffdefe
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#define KGDB_COMPILED_BREAK 0xe7ffdeff
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#define CACHE_FLUSH_IS_SAFE 1
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#ifndef __ASSEMBLY__
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static inline void arch_kgdb_breakpoint(void)
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{
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asm(".word 0xe7ffdeff");
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}
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extern void kgdb_handle_bus_error(void);
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extern int kgdb_fault_expected;
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#endif /* !__ASSEMBLY__ */
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/*
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* From Kevin Hilman:
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*
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* gdb is expecting the following registers layout.
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*
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* r0-r15: 1 long word each
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* f0-f7: unused, 3 long words each !!
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* fps: unused, 1 long word
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* cpsr: 1 long word
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*
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* Even though f0-f7 and fps are not used, they need to be
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* present in the registers sent for correct processing in
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* the host-side gdb.
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*
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* In particular, it is crucial that CPSR is in the right place,
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* otherwise gdb will not be able to correctly interpret stepping over
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* conditional branches.
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*/
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#define _GP_REGS 16
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#define _FP_REGS 8
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#define _EXTRA_REGS 2
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#define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS)
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#define KGDB_MAX_NO_CPUS 1
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#define BUFMAX 400
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#define NUMREGBYTES (GDB_MAX_REGS << 2)
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#define NUMCRITREGBYTES (32 << 2)
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#define _R0 0
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#define _R1 1
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#define _R2 2
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#define _R3 3
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#define _R4 4
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#define _R5 5
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#define _R6 6
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#define _R7 7
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#define _R8 8
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#define _R9 9
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#define _R10 10
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#define _FP 11
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#define _IP 12
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#define _SPT 13
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#define _LR 14
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#define _PC 15
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#define _CPSR (GDB_MAX_REGS - 1)
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/*
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* So that we can denote the end of a frame for tracing,
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* in the simple case:
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*/
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#define CFI_END_FRAME(func) __CFI_END_FRAME(_PC, _SPT, func)
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#endif /* __ASM_KGDB_H__ */
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