edcaf1a6a7
Make single kernel can be used on RBTX4927/37/38. Also make some SoC-specific code independent from board-specific code. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
79 lines
3 KiB
C
79 lines
3 KiB
C
/*
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* Author: MontaVista Software, Inc.
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* source@mvista.com
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*
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* Copyright 2001-2002 MontaVista Software Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
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* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __ASM_TXX9_RBTX4927_H
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#define __ASM_TXX9_RBTX4927_H
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#include <asm/txx9/tx4927.h>
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#define RBTX4927_PCIMEM 0x08000000
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#define RBTX4927_PCIMEM_SIZE 0x08000000
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#define RBTX4927_PCIIO 0x16000000
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#define RBTX4927_PCIIO_SIZE 0x01000000
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#define rbtx4927_pcireset_addr ((__u8 __iomem *)0xbc00f006UL)
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/* bits for ISTAT/IMASK/IMSTAT */
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#define RBTX4927_INTB_PCID 0
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#define RBTX4927_INTB_PCIC 1
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#define RBTX4927_INTB_PCIB 2
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#define RBTX4927_INTB_PCIA 3
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#define RBTX4927_INTF_PCID (1 << RBTX4927_INTB_PCID)
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#define RBTX4927_INTF_PCIC (1 << RBTX4927_INTB_PCIC)
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#define RBTX4927_INTF_PCIB (1 << RBTX4927_INTB_PCIB)
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#define RBTX4927_INTF_PCIA (1 << RBTX4927_INTB_PCIA)
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#define RBTX4927_NR_IRQ_IOC 8 /* IOC */
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#define RBTX4927_IRQ_IOC (TXX9_IRQ_BASE + TX4927_NUM_IR)
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#define RBTX4927_IRQ_IOC_PCID (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCID)
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#define RBTX4927_IRQ_IOC_PCIC (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIC)
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#define RBTX4927_IRQ_IOC_PCIB (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIB)
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#define RBTX4927_IRQ_IOC_PCIA (RBTX4927_IRQ_IOC + RBTX4927_INTB_PCIA)
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#define RBTX4927_IRQ_IOCINT (TXX9_IRQ_BASE + TX4927_IR_INT(1))
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#ifdef CONFIG_PCI
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#define RBTX4927_ISA_IO_OFFSET RBTX4927_PCIIO
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#else
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#define RBTX4927_ISA_IO_OFFSET 0
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#endif
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#define RBTX4927_SW_RESET_DO (void __iomem *)0xbc00f000UL
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#define RBTX4927_SW_RESET_DO_SET 0x01
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#define RBTX4927_SW_RESET_ENABLE (void __iomem *)0xbc00f002UL
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#define RBTX4927_SW_RESET_ENABLE_SET 0x01
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#define RBTX4927_RTL_8019_BASE (0x1c020280 - RBTX4927_ISA_IO_OFFSET)
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#define RBTX4927_RTL_8019_IRQ (TXX9_IRQ_BASE + TX4927_IR_INT(3))
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void rbtx4927_prom_init(void);
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void rbtx4927_irq_setup(void);
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struct pci_dev;
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int rbtx4927_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
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#endif /* __ASM_TXX9_RBTX4927_H */
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