f5f2b13129
In some cases when we are not using msi we need a way to ensure that the hardware does not have an msi capability enabled. Currently the code has been calling disable_msi_mode to try and achieve that. However disable_msi_mode has several other side effects and is only available when msi support is compiled in so it isn't really appropriate. Instead this patch implements pci_msi_off which disables all msi and msix capabilities unconditionally with no additional side effects. pci_disable_device was redundantly clearing the bus master enable flag and clearing the msi enable bit. A device that is not allowed to perform bus mastering operations cannot generate intx or msi interrupt messages as those are essentially a special case of dma, and require bus mastering. So the call in pci_disable_device to disable msi capabilities was redundant. quirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
985 lines
24 KiB
C
985 lines
24 KiB
C
/*
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* Derived from arch/i386/kernel/irq.c
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* Copyright (C) 1992 Linus Torvalds
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* Adapted from arch/i386 by Gary Thomas
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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* Updated and modified by Cort Dougan <cort@fsmlabs.com>
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* Copyright (C) 1996-2001 Cort Dougan
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* Adapted for Power Macintosh by Paul Mackerras
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* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
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* Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* This file contains the code used by various IRQ handling routines:
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* asking for different IRQ's should be done through these routines
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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*
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* The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
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* interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
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* mask register (of which only 16 are defined), hence the weird shifting
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* and complement of the cached_irq_mask. I want to be able to stuff
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* this right into the SIU SMASK register.
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* Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
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* to reduce code space and undefined function references.
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*/
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#undef DEBUG
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#include <linux/module.h>
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#include <linux/threads.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/seq_file.h>
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#include <linux/cpumask.h>
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#include <linux/profile.h>
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#include <linux/bitops.h>
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#include <linux/list.h>
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#include <linux/radix-tree.h>
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#include <linux/mutex.h>
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#include <linux/bootmem.h>
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#include <linux/pci.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/irq.h>
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#include <asm/cache.h>
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#include <asm/prom.h>
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#include <asm/ptrace.h>
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#include <asm/machdep.h>
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#include <asm/udbg.h>
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#include <asm/firmware.h>
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#endif
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int __irq_offset_value;
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static int ppc_spurious_interrupts;
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#ifdef CONFIG_PPC32
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EXPORT_SYMBOL(__irq_offset_value);
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atomic_t ppc_n_lost_interrupts;
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#ifndef CONFIG_PPC_MERGE
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#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
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unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
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#endif
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#ifdef CONFIG_TAU_INT
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extern int tau_initialized;
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extern int tau_interrupts(int);
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#endif
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#endif /* CONFIG_PPC32 */
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#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
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extern atomic_t ipi_recv;
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extern atomic_t ipi_sent;
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#endif
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#ifdef CONFIG_PPC64
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EXPORT_SYMBOL(irq_desc);
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int distribute_irqs = 1;
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static inline unsigned long get_hard_enabled(void)
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{
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unsigned long enabled;
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__asm__ __volatile__("lbz %0,%1(13)"
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: "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled)));
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return enabled;
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}
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static inline void set_soft_enabled(unsigned long enable)
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{
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__asm__ __volatile__("stb %0,%1(13)"
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: : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
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}
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void local_irq_restore(unsigned long en)
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{
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/*
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* get_paca()->soft_enabled = en;
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* Is it ever valid to use local_irq_restore(0) when soft_enabled is 1?
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* That was allowed before, and in such a case we do need to take care
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* that gcc will set soft_enabled directly via r13, not choose to use
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* an intermediate register, lest we're preempted to a different cpu.
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*/
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set_soft_enabled(en);
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if (!en)
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return;
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if (firmware_has_feature(FW_FEATURE_ISERIES)) {
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/*
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* Do we need to disable preemption here? Not really: in the
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* unlikely event that we're preempted to a different cpu in
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* between getting r13, loading its lppaca_ptr, and loading
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* its any_int, we might call iseries_handle_interrupts without
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* an interrupt pending on the new cpu, but that's no disaster,
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* is it? And the business of preempting us off the old cpu
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* would itself involve a local_irq_restore which handles the
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* interrupt to that cpu.
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*
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* But use "local_paca->lppaca_ptr" instead of "get_lppaca()"
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* to avoid any preemption checking added into get_paca().
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*/
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if (local_paca->lppaca_ptr->int_dword.any_int)
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iseries_handle_interrupts();
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return;
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}
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/*
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* if (get_paca()->hard_enabled) return;
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* But again we need to take care that gcc gets hard_enabled directly
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* via r13, not choose to use an intermediate register, lest we're
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* preempted to a different cpu in between the two instructions.
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*/
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if (get_hard_enabled())
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return;
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/*
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* Need to hard-enable interrupts here. Since currently disabled,
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* no need to take further asm precautions against preemption; but
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* use local_paca instead of get_paca() to avoid preemption checking.
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*/
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local_paca->hard_enabled = en;
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if ((int)mfspr(SPRN_DEC) < 0)
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mtspr(SPRN_DEC, 1);
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hard_irq_enable();
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}
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#endif /* CONFIG_PPC64 */
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *)v, j;
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struct irqaction *action;
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irq_desc_t *desc;
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unsigned long flags;
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if (i == 0) {
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seq_puts(p, " ");
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for_each_online_cpu(j)
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seq_printf(p, "CPU%d ", j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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desc = get_irq_desc(i);
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spin_lock_irqsave(&desc->lock, flags);
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action = desc->action;
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if (!action || !action->handler)
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goto skip;
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seq_printf(p, "%3d: ", i);
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#ifdef CONFIG_SMP
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
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#else
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seq_printf(p, "%10u ", kstat_irqs(i));
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#endif /* CONFIG_SMP */
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if (desc->chip)
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seq_printf(p, " %s ", desc->chip->typename);
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else
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seq_puts(p, " None ");
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seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge ");
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seq_printf(p, " %s", action->name);
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for (action = action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&desc->lock, flags);
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} else if (i == NR_IRQS) {
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#ifdef CONFIG_PPC32
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#ifdef CONFIG_TAU_INT
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if (tau_initialized){
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seq_puts(p, "TAU: ");
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", tau_interrupts(j));
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seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
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}
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#endif
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#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_MERGE)
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/* should this be per processor send/receive? */
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seq_printf(p, "IPI (recv/sent): %10u/%u\n",
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atomic_read(&ipi_recv), atomic_read(&ipi_sent));
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#endif
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#endif /* CONFIG_PPC32 */
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seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
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}
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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void fixup_irqs(cpumask_t map)
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{
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unsigned int irq;
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static int warned;
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for_each_irq(irq) {
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cpumask_t mask;
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if (irq_desc[irq].status & IRQ_PER_CPU)
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continue;
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cpus_and(mask, irq_desc[irq].affinity, map);
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if (any_online_cpu(mask) == NR_CPUS) {
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printk("Breaking affinity for irq %i\n", irq);
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mask = map;
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}
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if (irq_desc[irq].chip->set_affinity)
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irq_desc[irq].chip->set_affinity(irq, mask);
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else if (irq_desc[irq].action && !(warned++))
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printk("Cannot set affinity for irq %i\n", irq);
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}
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local_irq_enable();
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mdelay(1);
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local_irq_disable();
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}
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#endif
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void do_IRQ(struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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unsigned int irq;
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#ifdef CONFIG_IRQSTACKS
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struct thread_info *curtp, *irqtp;
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#endif
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irq_enter();
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* Debugging check for stack overflow: is there less than 2KB free? */
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{
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long sp;
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sp = __get_SP() & (THREAD_SIZE-1);
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if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
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printk("do_IRQ: stack overflow: %ld\n",
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sp - sizeof(struct thread_info));
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dump_stack();
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}
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}
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#endif
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/*
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* Every platform is required to implement ppc_md.get_irq.
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* This function will either return an irq number or NO_IRQ to
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* indicate there are no more pending.
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* The value NO_IRQ_IGNORE is for buggy hardware and means that this
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* IRQ has already been handled. -- Tom
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*/
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irq = ppc_md.get_irq();
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if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
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#ifdef CONFIG_IRQSTACKS
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/* Switch to the irq stack to handle this */
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curtp = current_thread_info();
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irqtp = hardirq_ctx[smp_processor_id()];
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if (curtp != irqtp) {
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struct irq_desc *desc = irq_desc + irq;
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void *handler = desc->handle_irq;
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if (handler == NULL)
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handler = &__do_IRQ;
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irqtp->task = curtp->task;
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irqtp->flags = 0;
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call_handle_irq(irq, desc, irqtp, handler);
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irqtp->task = NULL;
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if (irqtp->flags)
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set_bits(irqtp->flags, &curtp->flags);
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} else
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#endif
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generic_handle_irq(irq);
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} else if (irq != NO_IRQ_IGNORE)
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/* That's not SMP safe ... but who cares ? */
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ppc_spurious_interrupts++;
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irq_exit();
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set_irq_regs(old_regs);
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#ifdef CONFIG_PPC_ISERIES
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if (firmware_has_feature(FW_FEATURE_ISERIES) &&
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get_lppaca()->int_dword.fields.decr_int) {
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get_lppaca()->int_dword.fields.decr_int = 0;
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/* Signal a fake decrementer interrupt */
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timer_interrupt(regs);
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}
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#endif
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}
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void __init init_IRQ(void)
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{
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ppc_md.init_IRQ();
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#ifdef CONFIG_PPC64
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irq_ctx_init();
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#endif
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}
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#ifdef CONFIG_IRQSTACKS
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struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
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struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
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void irq_ctx_init(void)
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{
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struct thread_info *tp;
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int i;
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for_each_possible_cpu(i) {
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memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
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tp = softirq_ctx[i];
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tp->cpu = i;
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tp->preempt_count = SOFTIRQ_OFFSET;
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memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
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tp = hardirq_ctx[i];
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tp->cpu = i;
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tp->preempt_count = HARDIRQ_OFFSET;
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}
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}
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static inline void do_softirq_onstack(void)
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{
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struct thread_info *curtp, *irqtp;
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curtp = current_thread_info();
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irqtp = softirq_ctx[smp_processor_id()];
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irqtp->task = curtp->task;
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call_do_softirq(irqtp);
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irqtp->task = NULL;
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}
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#else
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#define do_softirq_onstack() __do_softirq()
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#endif /* CONFIG_IRQSTACKS */
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void do_softirq(void)
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{
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unsigned long flags;
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if (in_interrupt())
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return;
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local_irq_save(flags);
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if (local_softirq_pending())
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do_softirq_onstack();
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local_irq_restore(flags);
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}
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EXPORT_SYMBOL(do_softirq);
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/*
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* IRQ controller and virtual interrupts
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*/
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#ifdef CONFIG_PPC_MERGE
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static LIST_HEAD(irq_hosts);
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static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED;
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static DEFINE_PER_CPU(unsigned int, irq_radix_reader);
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static unsigned int irq_radix_writer;
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struct irq_map_entry irq_map[NR_IRQS];
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static unsigned int irq_virq_count = NR_IRQS;
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static struct irq_host *irq_default_host;
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struct irq_host *irq_alloc_host(unsigned int revmap_type,
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unsigned int revmap_arg,
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struct irq_host_ops *ops,
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irq_hw_number_t inval_irq)
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{
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struct irq_host *host;
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unsigned int size = sizeof(struct irq_host);
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unsigned int i;
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unsigned int *rmap;
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unsigned long flags;
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/* Allocate structure and revmap table if using linear mapping */
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if (revmap_type == IRQ_HOST_MAP_LINEAR)
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size += revmap_arg * sizeof(unsigned int);
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if (mem_init_done)
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host = kzalloc(size, GFP_KERNEL);
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else {
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host = alloc_bootmem(size);
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if (host)
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memset(host, 0, size);
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}
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if (host == NULL)
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return NULL;
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/* Fill structure */
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host->revmap_type = revmap_type;
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host->inval_irq = inval_irq;
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host->ops = ops;
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spin_lock_irqsave(&irq_big_lock, flags);
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/* If it's a legacy controller, check for duplicates and
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* mark it as allocated (we use irq 0 host pointer for that
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*/
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if (revmap_type == IRQ_HOST_MAP_LEGACY) {
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if (irq_map[0].host != NULL) {
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spin_unlock_irqrestore(&irq_big_lock, flags);
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/* If we are early boot, we can't free the structure,
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* too bad...
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* this will be fixed once slab is made available early
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* instead of the current cruft
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*/
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if (mem_init_done)
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kfree(host);
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return NULL;
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}
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irq_map[0].host = host;
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}
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|
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list_add(&host->link, &irq_hosts);
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spin_unlock_irqrestore(&irq_big_lock, flags);
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|
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/* Additional setups per revmap type */
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switch(revmap_type) {
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case IRQ_HOST_MAP_LEGACY:
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/* 0 is always the invalid number for legacy */
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host->inval_irq = 0;
|
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/* setup us as the host for all legacy interrupts */
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for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
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irq_map[i].hwirq = 0;
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smp_wmb();
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irq_map[i].host = host;
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smp_wmb();
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|
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/* Clear norequest flags */
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get_irq_desc(i)->status &= ~IRQ_NOREQUEST;
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|
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/* Legacy flags are left to default at this point,
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* one can then use irq_create_mapping() to
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* explicitely change them
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*/
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ops->map(host, i, i);
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}
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break;
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case IRQ_HOST_MAP_LINEAR:
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rmap = (unsigned int *)(host + 1);
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for (i = 0; i < revmap_arg; i++)
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rmap[i] = IRQ_NONE;
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host->revmap_data.linear.size = revmap_arg;
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smp_wmb();
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host->revmap_data.linear.revmap = rmap;
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break;
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default:
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break;
|
|
}
|
|
|
|
pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
|
|
|
|
return host;
|
|
}
|
|
|
|
struct irq_host *irq_find_host(struct device_node *node)
|
|
{
|
|
struct irq_host *h, *found = NULL;
|
|
unsigned long flags;
|
|
|
|
/* We might want to match the legacy controller last since
|
|
* it might potentially be set to match all interrupts in
|
|
* the absence of a device node. This isn't a problem so far
|
|
* yet though...
|
|
*/
|
|
spin_lock_irqsave(&irq_big_lock, flags);
|
|
list_for_each_entry(h, &irq_hosts, link)
|
|
if (h->ops->match == NULL || h->ops->match(h, node)) {
|
|
found = h;
|
|
break;
|
|
}
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
return found;
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_find_host);
|
|
|
|
void irq_set_default_host(struct irq_host *host)
|
|
{
|
|
pr_debug("irq: Default host set to @0x%p\n", host);
|
|
|
|
irq_default_host = host;
|
|
}
|
|
|
|
void irq_set_virq_count(unsigned int count)
|
|
{
|
|
pr_debug("irq: Trying to set virq count to %d\n", count);
|
|
|
|
BUG_ON(count < NUM_ISA_INTERRUPTS);
|
|
if (count < NR_IRQS)
|
|
irq_virq_count = count;
|
|
}
|
|
|
|
/* radix tree not lockless safe ! we use a brlock-type mecanism
|
|
* for now, until we can use a lockless radix tree
|
|
*/
|
|
static void irq_radix_wrlock(unsigned long *flags)
|
|
{
|
|
unsigned int cpu, ok;
|
|
|
|
spin_lock_irqsave(&irq_big_lock, *flags);
|
|
irq_radix_writer = 1;
|
|
smp_mb();
|
|
do {
|
|
barrier();
|
|
ok = 1;
|
|
for_each_possible_cpu(cpu) {
|
|
if (per_cpu(irq_radix_reader, cpu)) {
|
|
ok = 0;
|
|
break;
|
|
}
|
|
}
|
|
if (!ok)
|
|
cpu_relax();
|
|
} while(!ok);
|
|
}
|
|
|
|
static void irq_radix_wrunlock(unsigned long flags)
|
|
{
|
|
smp_wmb();
|
|
irq_radix_writer = 0;
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
}
|
|
|
|
static void irq_radix_rdlock(unsigned long *flags)
|
|
{
|
|
local_irq_save(*flags);
|
|
__get_cpu_var(irq_radix_reader) = 1;
|
|
smp_mb();
|
|
if (likely(irq_radix_writer == 0))
|
|
return;
|
|
__get_cpu_var(irq_radix_reader) = 0;
|
|
smp_wmb();
|
|
spin_lock(&irq_big_lock);
|
|
__get_cpu_var(irq_radix_reader) = 1;
|
|
spin_unlock(&irq_big_lock);
|
|
}
|
|
|
|
static void irq_radix_rdunlock(unsigned long flags)
|
|
{
|
|
__get_cpu_var(irq_radix_reader) = 0;
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
|
|
unsigned int irq_create_mapping(struct irq_host *host,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
unsigned int virq, hint;
|
|
|
|
pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
|
|
|
|
/* Look for default host if nececssary */
|
|
if (host == NULL)
|
|
host = irq_default_host;
|
|
if (host == NULL) {
|
|
printk(KERN_WARNING "irq_create_mapping called for"
|
|
" NULL host, hwirq=%lx\n", hwirq);
|
|
WARN_ON(1);
|
|
return NO_IRQ;
|
|
}
|
|
pr_debug("irq: -> using host @%p\n", host);
|
|
|
|
/* Check if mapping already exist, if it does, call
|
|
* host->ops->map() to update the flags
|
|
*/
|
|
virq = irq_find_mapping(host, hwirq);
|
|
if (virq != IRQ_NONE) {
|
|
if (host->ops->remap)
|
|
host->ops->remap(host, virq, hwirq);
|
|
pr_debug("irq: -> existing mapping on virq %d\n", virq);
|
|
return virq;
|
|
}
|
|
|
|
/* Get a virtual interrupt number */
|
|
if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
|
|
/* Handle legacy */
|
|
virq = (unsigned int)hwirq;
|
|
if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
|
|
return NO_IRQ;
|
|
return virq;
|
|
} else {
|
|
/* Allocate a virtual interrupt number */
|
|
hint = hwirq % irq_virq_count;
|
|
virq = irq_alloc_virt(host, 1, hint);
|
|
if (virq == NO_IRQ) {
|
|
pr_debug("irq: -> virq allocation failed\n");
|
|
return NO_IRQ;
|
|
}
|
|
}
|
|
pr_debug("irq: -> obtained virq %d\n", virq);
|
|
|
|
/* Clear IRQ_NOREQUEST flag */
|
|
get_irq_desc(virq)->status &= ~IRQ_NOREQUEST;
|
|
|
|
/* map it */
|
|
smp_wmb();
|
|
irq_map[virq].hwirq = hwirq;
|
|
smp_mb();
|
|
if (host->ops->map(host, virq, hwirq)) {
|
|
pr_debug("irq: -> mapping failed, freeing\n");
|
|
irq_free_virt(virq, 1);
|
|
return NO_IRQ;
|
|
}
|
|
return virq;
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_create_mapping);
|
|
|
|
unsigned int irq_create_of_mapping(struct device_node *controller,
|
|
u32 *intspec, unsigned int intsize)
|
|
{
|
|
struct irq_host *host;
|
|
irq_hw_number_t hwirq;
|
|
unsigned int type = IRQ_TYPE_NONE;
|
|
unsigned int virq;
|
|
|
|
if (controller == NULL)
|
|
host = irq_default_host;
|
|
else
|
|
host = irq_find_host(controller);
|
|
if (host == NULL) {
|
|
printk(KERN_WARNING "irq: no irq host found for %s !\n",
|
|
controller->full_name);
|
|
return NO_IRQ;
|
|
}
|
|
|
|
/* If host has no translation, then we assume interrupt line */
|
|
if (host->ops->xlate == NULL)
|
|
hwirq = intspec[0];
|
|
else {
|
|
if (host->ops->xlate(host, controller, intspec, intsize,
|
|
&hwirq, &type))
|
|
return NO_IRQ;
|
|
}
|
|
|
|
/* Create mapping */
|
|
virq = irq_create_mapping(host, hwirq);
|
|
if (virq == NO_IRQ)
|
|
return virq;
|
|
|
|
/* Set type if specified and different than the current one */
|
|
if (type != IRQ_TYPE_NONE &&
|
|
type != (get_irq_desc(virq)->status & IRQF_TRIGGER_MASK))
|
|
set_irq_type(virq, type);
|
|
return virq;
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_create_of_mapping);
|
|
|
|
unsigned int irq_of_parse_and_map(struct device_node *dev, int index)
|
|
{
|
|
struct of_irq oirq;
|
|
|
|
if (of_irq_map_one(dev, index, &oirq))
|
|
return NO_IRQ;
|
|
|
|
return irq_create_of_mapping(oirq.controller, oirq.specifier,
|
|
oirq.size);
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_of_parse_and_map);
|
|
|
|
void irq_dispose_mapping(unsigned int virq)
|
|
{
|
|
struct irq_host *host;
|
|
irq_hw_number_t hwirq;
|
|
unsigned long flags;
|
|
|
|
if (virq == NO_IRQ)
|
|
return;
|
|
|
|
host = irq_map[virq].host;
|
|
WARN_ON (host == NULL);
|
|
if (host == NULL)
|
|
return;
|
|
|
|
/* Never unmap legacy interrupts */
|
|
if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
|
|
return;
|
|
|
|
/* remove chip and handler */
|
|
set_irq_chip_and_handler(virq, NULL, NULL);
|
|
|
|
/* Make sure it's completed */
|
|
synchronize_irq(virq);
|
|
|
|
/* Tell the PIC about it */
|
|
if (host->ops->unmap)
|
|
host->ops->unmap(host, virq);
|
|
smp_mb();
|
|
|
|
/* Clear reverse map */
|
|
hwirq = irq_map[virq].hwirq;
|
|
switch(host->revmap_type) {
|
|
case IRQ_HOST_MAP_LINEAR:
|
|
if (hwirq < host->revmap_data.linear.size)
|
|
host->revmap_data.linear.revmap[hwirq] = IRQ_NONE;
|
|
break;
|
|
case IRQ_HOST_MAP_TREE:
|
|
/* Check if radix tree allocated yet */
|
|
if (host->revmap_data.tree.gfp_mask == 0)
|
|
break;
|
|
irq_radix_wrlock(&flags);
|
|
radix_tree_delete(&host->revmap_data.tree, hwirq);
|
|
irq_radix_wrunlock(flags);
|
|
break;
|
|
}
|
|
|
|
/* Destroy map */
|
|
smp_mb();
|
|
irq_map[virq].hwirq = host->inval_irq;
|
|
|
|
/* Set some flags */
|
|
get_irq_desc(virq)->status |= IRQ_NOREQUEST;
|
|
|
|
/* Free it */
|
|
irq_free_virt(virq, 1);
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_dispose_mapping);
|
|
|
|
unsigned int irq_find_mapping(struct irq_host *host,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
unsigned int i;
|
|
unsigned int hint = hwirq % irq_virq_count;
|
|
|
|
/* Look for default host if nececssary */
|
|
if (host == NULL)
|
|
host = irq_default_host;
|
|
if (host == NULL)
|
|
return NO_IRQ;
|
|
|
|
/* legacy -> bail early */
|
|
if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
|
|
return hwirq;
|
|
|
|
/* Slow path does a linear search of the map */
|
|
if (hint < NUM_ISA_INTERRUPTS)
|
|
hint = NUM_ISA_INTERRUPTS;
|
|
i = hint;
|
|
do {
|
|
if (irq_map[i].host == host &&
|
|
irq_map[i].hwirq == hwirq)
|
|
return i;
|
|
i++;
|
|
if (i >= irq_virq_count)
|
|
i = NUM_ISA_INTERRUPTS;
|
|
} while(i != hint);
|
|
return NO_IRQ;
|
|
}
|
|
EXPORT_SYMBOL_GPL(irq_find_mapping);
|
|
|
|
|
|
unsigned int irq_radix_revmap(struct irq_host *host,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
struct radix_tree_root *tree;
|
|
struct irq_map_entry *ptr;
|
|
unsigned int virq;
|
|
unsigned long flags;
|
|
|
|
WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
|
|
|
|
/* Check if the radix tree exist yet. We test the value of
|
|
* the gfp_mask for that. Sneaky but saves another int in the
|
|
* structure. If not, we fallback to slow mode
|
|
*/
|
|
tree = &host->revmap_data.tree;
|
|
if (tree->gfp_mask == 0)
|
|
return irq_find_mapping(host, hwirq);
|
|
|
|
/* Now try to resolve */
|
|
irq_radix_rdlock(&flags);
|
|
ptr = radix_tree_lookup(tree, hwirq);
|
|
irq_radix_rdunlock(flags);
|
|
|
|
/* Found it, return */
|
|
if (ptr) {
|
|
virq = ptr - irq_map;
|
|
return virq;
|
|
}
|
|
|
|
/* If not there, try to insert it */
|
|
virq = irq_find_mapping(host, hwirq);
|
|
if (virq != NO_IRQ) {
|
|
irq_radix_wrlock(&flags);
|
|
radix_tree_insert(tree, hwirq, &irq_map[virq]);
|
|
irq_radix_wrunlock(flags);
|
|
}
|
|
return virq;
|
|
}
|
|
|
|
unsigned int irq_linear_revmap(struct irq_host *host,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
unsigned int *revmap;
|
|
|
|
WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
|
|
|
|
/* Check revmap bounds */
|
|
if (unlikely(hwirq >= host->revmap_data.linear.size))
|
|
return irq_find_mapping(host, hwirq);
|
|
|
|
/* Check if revmap was allocated */
|
|
revmap = host->revmap_data.linear.revmap;
|
|
if (unlikely(revmap == NULL))
|
|
return irq_find_mapping(host, hwirq);
|
|
|
|
/* Fill up revmap with slow path if no mapping found */
|
|
if (unlikely(revmap[hwirq] == NO_IRQ))
|
|
revmap[hwirq] = irq_find_mapping(host, hwirq);
|
|
|
|
return revmap[hwirq];
|
|
}
|
|
|
|
unsigned int irq_alloc_virt(struct irq_host *host,
|
|
unsigned int count,
|
|
unsigned int hint)
|
|
{
|
|
unsigned long flags;
|
|
unsigned int i, j, found = NO_IRQ;
|
|
|
|
if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
|
|
return NO_IRQ;
|
|
|
|
spin_lock_irqsave(&irq_big_lock, flags);
|
|
|
|
/* Use hint for 1 interrupt if any */
|
|
if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
|
|
hint < irq_virq_count && irq_map[hint].host == NULL) {
|
|
found = hint;
|
|
goto hint_found;
|
|
}
|
|
|
|
/* Look for count consecutive numbers in the allocatable
|
|
* (non-legacy) space
|
|
*/
|
|
for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
|
|
if (irq_map[i].host != NULL)
|
|
j = 0;
|
|
else
|
|
j++;
|
|
|
|
if (j == count) {
|
|
found = i - count + 1;
|
|
break;
|
|
}
|
|
}
|
|
if (found == NO_IRQ) {
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
return NO_IRQ;
|
|
}
|
|
hint_found:
|
|
for (i = found; i < (found + count); i++) {
|
|
irq_map[i].hwirq = host->inval_irq;
|
|
smp_wmb();
|
|
irq_map[i].host = host;
|
|
}
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
return found;
|
|
}
|
|
|
|
void irq_free_virt(unsigned int virq, unsigned int count)
|
|
{
|
|
unsigned long flags;
|
|
unsigned int i;
|
|
|
|
WARN_ON (virq < NUM_ISA_INTERRUPTS);
|
|
WARN_ON (count == 0 || (virq + count) > irq_virq_count);
|
|
|
|
spin_lock_irqsave(&irq_big_lock, flags);
|
|
for (i = virq; i < (virq + count); i++) {
|
|
struct irq_host *host;
|
|
|
|
if (i < NUM_ISA_INTERRUPTS ||
|
|
(virq + count) > irq_virq_count)
|
|
continue;
|
|
|
|
host = irq_map[i].host;
|
|
irq_map[i].hwirq = host->inval_irq;
|
|
smp_wmb();
|
|
irq_map[i].host = NULL;
|
|
}
|
|
spin_unlock_irqrestore(&irq_big_lock, flags);
|
|
}
|
|
|
|
void irq_early_init(void)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < NR_IRQS; i++)
|
|
get_irq_desc(i)->status |= IRQ_NOREQUEST;
|
|
}
|
|
|
|
/* We need to create the radix trees late */
|
|
static int irq_late_init(void)
|
|
{
|
|
struct irq_host *h;
|
|
unsigned long flags;
|
|
|
|
irq_radix_wrlock(&flags);
|
|
list_for_each_entry(h, &irq_hosts, link) {
|
|
if (h->revmap_type == IRQ_HOST_MAP_TREE)
|
|
INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC);
|
|
}
|
|
irq_radix_wrunlock(flags);
|
|
|
|
return 0;
|
|
}
|
|
arch_initcall(irq_late_init);
|
|
|
|
#endif /* CONFIG_PPC_MERGE */
|
|
|
|
#ifdef CONFIG_PCI_MSI
|
|
int pci_enable_msi(struct pci_dev * pdev)
|
|
{
|
|
if (ppc_md.enable_msi)
|
|
return ppc_md.enable_msi(pdev);
|
|
else
|
|
return -1;
|
|
}
|
|
EXPORT_SYMBOL(pci_enable_msi);
|
|
|
|
void pci_disable_msi(struct pci_dev * pdev)
|
|
{
|
|
if (ppc_md.disable_msi)
|
|
ppc_md.disable_msi(pdev);
|
|
}
|
|
EXPORT_SYMBOL(pci_disable_msi);
|
|
|
|
void pci_scan_msi_device(struct pci_dev *dev) {}
|
|
int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;}
|
|
void pci_disable_msix(struct pci_dev *dev) {}
|
|
void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
|
|
void pci_no_msi(void) {}
|
|
EXPORT_SYMBOL(pci_enable_msix);
|
|
EXPORT_SYMBOL(pci_disable_msix);
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC64
|
|
static int __init setup_noirqdistrib(char *str)
|
|
{
|
|
distribute_irqs = 0;
|
|
return 1;
|
|
}
|
|
|
|
__setup("noirqdistrib", setup_noirqdistrib);
|
|
#endif /* CONFIG_PPC64 */
|