0a0300dc8c
Most machine classes want some way to register a block of clk_lookup structures, and most do it by implementing a clks_register() type function which walks an array, or by open-coding a loop. Consolidate all this into clkdev_add_table(). Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
133 lines
3.1 KiB
C
133 lines
3.1 KiB
C
/*
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* Hardware definitions for the Toshiba eseries PDAs
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*
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* Copyright (c) 2003 Ian Molton <spyro@f2s.com>
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*
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* This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <asm/setup.h>
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#include <asm/mach/arch.h>
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#include <asm/mach-types.h>
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#include <mach/pxa25x.h>
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#include <mach/eseries-gpio.h>
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#include <mach/udc.h>
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#include <mach/irda.h>
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#include "generic.h"
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#include "clock.h"
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/* Only e800 has 128MB RAM */
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void __init eseries_fixup(struct machine_desc *desc,
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struct tag *tags, char **cmdline, struct meminfo *mi)
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{
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mi->nr_banks=1;
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mi->bank[0].start = 0xa0000000;
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mi->bank[0].node = 0;
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if (machine_is_e800())
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mi->bank[0].size = (128*1024*1024);
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else
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mi->bank[0].size = (64*1024*1024);
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}
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struct pxa2xx_udc_mach_info e7xx_udc_mach_info = {
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.gpio_vbus = GPIO_E7XX_USB_DISC,
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.gpio_pullup = GPIO_E7XX_USB_PULLUP,
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.gpio_pullup_inverted = 1
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};
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struct pxaficp_platform_data e7xx_ficp_platform_data = {
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.gpio_pwdown = GPIO_E7XX_IR_OFF,
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.transceiver_cap = IR_SIRMODE | IR_OFF,
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};
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int eseries_tmio_enable(struct platform_device *dev)
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{
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/* Reset - bring SUSPEND high before PCLR */
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gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
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gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
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msleep(1);
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gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
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msleep(1);
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gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 1);
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msleep(1);
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return 0;
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}
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int eseries_tmio_disable(struct platform_device *dev)
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{
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gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
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gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0);
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return 0;
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}
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int eseries_tmio_suspend(struct platform_device *dev)
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{
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gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0);
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return 0;
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}
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int eseries_tmio_resume(struct platform_device *dev)
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{
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gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 1);
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msleep(1);
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return 0;
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}
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void eseries_get_tmio_gpios(void)
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{
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gpio_request(GPIO_ESERIES_TMIO_SUSPEND, NULL);
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gpio_request(GPIO_ESERIES_TMIO_PCLR, NULL);
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gpio_direction_output(GPIO_ESERIES_TMIO_SUSPEND, 0);
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gpio_direction_output(GPIO_ESERIES_TMIO_PCLR, 0);
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}
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/* TMIO controller uses the same resources on all e-series machines. */
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struct resource eseries_tmio_resources[] = {
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[0] = {
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.start = PXA_CS4_PHYS,
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.end = PXA_CS4_PHYS + 0x1fffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
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.end = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ),
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.flags = IORESOURCE_IRQ,
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},
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};
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/* Some e-series hardware cannot control the 32K clock */
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static void clk_32k_dummy(struct clk *clk)
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{
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}
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static const struct clkops clk_32k_dummy_ops = {
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.enable = clk_32k_dummy,
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.disable = clk_32k_dummy,
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};
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static struct clk tmio_dummy_clk = {
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.ops = &clk_32k_dummy_ops,
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.rate = 32768,
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};
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static struct clk_lookup eseries_clkregs[] = {
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INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"),
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};
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void eseries_register_clks(void)
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{
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clkdev_add_table(eseries_clkregs, ARRAY_SIZE(eseries_clkregs));
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}
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