a8b0ca17b8
The nmi parameter indicated if we could do wakeups from the current
context, if not, we would set some state and self-IPI and let the
resulting interrupt do the wakeup.
For the various event classes:
- hardware: nmi=0; PMI is in fact an NMI or we run irq_work_run from
the PMI-tail (ARM etc.)
- tracepoint: nmi=0; since tracepoint could be from NMI context.
- software: nmi=[0,1]; some, like the schedule thing cannot
perform wakeups, and hence need 0.
As one can see, there is very little nmi=1 usage, and the down-side of
not using it is that on some platforms some software events can have a
jiffy delay in wakeup (when arch_irq_work_raise isn't implemented).
The up-side however is that we can remove the nmi parameter and save a
bunch of conditionals in fast paths.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Michael Cree <mcree@orcon.net.nz>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com>
Cc: Anton Blanchard <anton@samba.org>
Cc: Eric B Munson <emunson@mgebm.net>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: David S. Miller <davem@davemloft.net>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Jason Wessel <jason.wessel@windriver.com>
Cc: Don Zickus <dzickus@redhat.com>
Link: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.org
Signed-off-by: Ingo Molnar <mingo@elte.hu>
379 lines
9.2 KiB
C
379 lines
9.2 KiB
C
/*
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* unaligned.c: Unaligned load/store trap handling with special
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* cases for the kernel to do them more quickly.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <linux/smp.h>
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#include <linux/perf_event.h>
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enum direction {
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load, /* ld, ldd, ldh, ldsh */
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store, /* st, std, sth, stsh */
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both, /* Swap, ldstub, etc. */
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fpload,
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fpstore,
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invalid,
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};
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static inline enum direction decode_direction(unsigned int insn)
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{
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unsigned long tmp = (insn >> 21) & 1;
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if(!tmp)
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return load;
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else {
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if(((insn>>19)&0x3f) == 15)
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return both;
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else
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return store;
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}
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}
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/* 8 = double-word, 4 = word, 2 = half-word */
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static inline int decode_access_size(unsigned int insn)
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{
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insn = (insn >> 19) & 3;
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if(!insn)
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return 4;
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else if(insn == 3)
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return 8;
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else if(insn == 2)
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return 2;
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else {
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printk("Impossible unaligned trap. insn=%08x\n", insn);
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die_if_kernel("Byte sized unaligned access?!?!", current->thread.kregs);
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return 4; /* just to keep gcc happy. */
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}
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}
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/* 0x400000 = signed, 0 = unsigned */
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static inline int decode_signedness(unsigned int insn)
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{
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return (insn & 0x400000);
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}
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static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
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unsigned int rd)
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{
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if(rs2 >= 16 || rs1 >= 16 || rd >= 16) {
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/* Wheee... */
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__asm__ __volatile__("save %sp, -0x40, %sp\n\t"
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"save %sp, -0x40, %sp\n\t"
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"save %sp, -0x40, %sp\n\t"
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"save %sp, -0x40, %sp\n\t"
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"save %sp, -0x40, %sp\n\t"
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"save %sp, -0x40, %sp\n\t"
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"save %sp, -0x40, %sp\n\t"
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"restore; restore; restore; restore;\n\t"
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"restore; restore; restore;\n\t");
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}
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}
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static inline int sign_extend_imm13(int imm)
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{
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return imm << 19 >> 19;
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}
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static inline unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
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{
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struct reg_window32 *win;
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if(reg < 16)
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return (!reg ? 0 : regs->u_regs[reg]);
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/* Ho hum, the slightly complicated case. */
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win = (struct reg_window32 *) regs->u_regs[UREG_FP];
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return win->locals[reg - 16]; /* yes, I know what this does... */
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}
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static inline unsigned long safe_fetch_reg(unsigned int reg, struct pt_regs *regs)
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{
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struct reg_window32 __user *win;
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unsigned long ret;
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if (reg < 16)
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return (!reg ? 0 : regs->u_regs[reg]);
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/* Ho hum, the slightly complicated case. */
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win = (struct reg_window32 __user *) regs->u_regs[UREG_FP];
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if ((unsigned long)win & 3)
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return -1;
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if (get_user(ret, &win->locals[reg - 16]))
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return -1;
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return ret;
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}
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static inline unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
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{
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struct reg_window32 *win;
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if(reg < 16)
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return ®s->u_regs[reg];
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win = (struct reg_window32 *) regs->u_regs[UREG_FP];
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return &win->locals[reg - 16];
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}
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static unsigned long compute_effective_address(struct pt_regs *regs,
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unsigned int insn)
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{
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unsigned int rs1 = (insn >> 14) & 0x1f;
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unsigned int rs2 = insn & 0x1f;
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unsigned int rd = (insn >> 25) & 0x1f;
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if(insn & 0x2000) {
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maybe_flush_windows(rs1, 0, rd);
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return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
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} else {
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maybe_flush_windows(rs1, rs2, rd);
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return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
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}
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}
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unsigned long safe_compute_effective_address(struct pt_regs *regs,
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unsigned int insn)
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{
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unsigned int rs1 = (insn >> 14) & 0x1f;
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unsigned int rs2 = insn & 0x1f;
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unsigned int rd = (insn >> 25) & 0x1f;
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if(insn & 0x2000) {
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maybe_flush_windows(rs1, 0, rd);
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return (safe_fetch_reg(rs1, regs) + sign_extend_imm13(insn));
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} else {
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maybe_flush_windows(rs1, rs2, rd);
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return (safe_fetch_reg(rs1, regs) + safe_fetch_reg(rs2, regs));
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}
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}
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/* This is just to make gcc think panic does return... */
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static void unaligned_panic(char *str)
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{
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panic(str);
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}
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/* una_asm.S */
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extern int do_int_load(unsigned long *dest_reg, int size,
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unsigned long *saddr, int is_signed);
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extern int __do_int_store(unsigned long *dst_addr, int size,
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unsigned long *src_val);
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static int do_int_store(int reg_num, int size, unsigned long *dst_addr,
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struct pt_regs *regs)
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{
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unsigned long zero[2] = { 0, 0 };
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unsigned long *src_val;
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if (reg_num)
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src_val = fetch_reg_addr(reg_num, regs);
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else {
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src_val = &zero[0];
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if (size == 8)
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zero[1] = fetch_reg(1, regs);
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}
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return __do_int_store(dst_addr, size, src_val);
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}
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extern void smp_capture(void);
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extern void smp_release(void);
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static inline void advance(struct pt_regs *regs)
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{
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regs->pc = regs->npc;
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regs->npc += 4;
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}
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static inline int floating_point_load_or_store_p(unsigned int insn)
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{
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return (insn >> 24) & 1;
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}
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static inline int ok_for_kernel(unsigned int insn)
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{
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return !floating_point_load_or_store_p(insn);
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}
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static void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
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{
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unsigned long g2 = regs->u_regs [UREG_G2];
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unsigned long fixup = search_extables_range(regs->pc, &g2);
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if (!fixup) {
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unsigned long address = compute_effective_address(regs, insn);
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if(address < PAGE_SIZE) {
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printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference in mna handler");
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} else
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printk(KERN_ALERT "Unable to handle kernel paging request in mna handler");
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printk(KERN_ALERT " at virtual address %08lx\n",address);
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printk(KERN_ALERT "current->{mm,active_mm}->context = %08lx\n",
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(current->mm ? current->mm->context :
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current->active_mm->context));
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printk(KERN_ALERT "current->{mm,active_mm}->pgd = %08lx\n",
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(current->mm ? (unsigned long) current->mm->pgd :
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(unsigned long) current->active_mm->pgd));
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die_if_kernel("Oops", regs);
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/* Not reached */
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}
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regs->pc = fixup;
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regs->npc = regs->pc + 4;
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regs->u_regs [UREG_G2] = g2;
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}
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asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
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{
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enum direction dir = decode_direction(insn);
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int size = decode_access_size(insn);
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if(!ok_for_kernel(insn) || dir == both) {
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printk("Unsupported unaligned load/store trap for kernel at <%08lx>.\n",
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regs->pc);
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unaligned_panic("Wheee. Kernel does fpu/atomic unaligned load/store.");
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} else {
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unsigned long addr = compute_effective_address(regs, insn);
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int err;
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
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switch (dir) {
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case load:
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err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f),
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regs),
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size, (unsigned long *) addr,
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decode_signedness(insn));
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break;
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case store:
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err = do_int_store(((insn>>25)&0x1f), size,
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(unsigned long *) addr, regs);
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break;
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default:
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panic("Impossible kernel unaligned trap.");
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/* Not reached... */
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}
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if (err)
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kernel_mna_trap_fault(regs, insn);
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else
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advance(regs);
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}
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}
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static inline int ok_for_user(struct pt_regs *regs, unsigned int insn,
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enum direction dir)
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{
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unsigned int reg;
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int check = (dir == load) ? VERIFY_READ : VERIFY_WRITE;
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int size = ((insn >> 19) & 3) == 3 ? 8 : 4;
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if ((regs->pc | regs->npc) & 3)
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return 0;
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/* Must access_ok() in all the necessary places. */
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#define WINREG_ADDR(regnum) \
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((void __user *)(((unsigned long *)regs->u_regs[UREG_FP])+(regnum)))
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reg = (insn >> 25) & 0x1f;
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if (reg >= 16) {
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if (!access_ok(check, WINREG_ADDR(reg - 16), size))
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return -EFAULT;
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}
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reg = (insn >> 14) & 0x1f;
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if (reg >= 16) {
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if (!access_ok(check, WINREG_ADDR(reg - 16), size))
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return -EFAULT;
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}
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if (!(insn & 0x2000)) {
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reg = (insn & 0x1f);
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if (reg >= 16) {
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if (!access_ok(check, WINREG_ADDR(reg - 16), size))
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return -EFAULT;
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}
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}
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#undef WINREG_ADDR
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return 0;
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}
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static void user_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
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{
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siginfo_t info;
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info.si_signo = SIGBUS;
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info.si_errno = 0;
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info.si_code = BUS_ADRALN;
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info.si_addr = (void __user *)safe_compute_effective_address(regs, insn);
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info.si_trapno = 0;
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send_sig_info(SIGBUS, &info, current);
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}
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asmlinkage void user_unaligned_trap(struct pt_regs *regs, unsigned int insn)
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{
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enum direction dir;
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if(!(current->thread.flags & SPARC_FLAG_UNALIGNED) ||
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(((insn >> 30) & 3) != 3))
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goto kill_user;
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dir = decode_direction(insn);
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if(!ok_for_user(regs, insn, dir)) {
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goto kill_user;
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} else {
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int err, size = decode_access_size(insn);
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unsigned long addr;
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if(floating_point_load_or_store_p(insn)) {
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printk("User FPU load/store unaligned unsupported.\n");
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goto kill_user;
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}
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addr = compute_effective_address(regs, insn);
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perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
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switch(dir) {
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case load:
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err = do_int_load(fetch_reg_addr(((insn>>25)&0x1f),
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regs),
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size, (unsigned long *) addr,
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decode_signedness(insn));
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break;
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case store:
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err = do_int_store(((insn>>25)&0x1f), size,
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(unsigned long *) addr, regs);
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break;
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case both:
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/*
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* This was supported in 2.4. However, we question
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* the value of SWAP instruction across word boundaries.
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*/
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printk("Unaligned SWAP unsupported.\n");
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err = -EFAULT;
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break;
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default:
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unaligned_panic("Impossible user unaligned trap.");
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goto out;
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}
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if (err)
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goto kill_user;
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else
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advance(regs);
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goto out;
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}
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kill_user:
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user_mna_trap_fault(regs, insn);
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out:
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;
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}
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