fb1c8f93d8
This patch (written by me and also containing many suggestions of Arjan van de Ven) does a major cleanup of the spinlock code. It does the following things: - consolidates and enhances the spinlock/rwlock debugging code - simplifies the asm/spinlock.h files - encapsulates the raw spinlock type and moves generic spinlock features (such as ->break_lock) into the generic code. - cleans up the spinlock code hierarchy to get rid of the spaghetti. Most notably there's now only a single variant of the debugging code, located in lib/spinlock_debug.c. (previously we had one SMP debugging variant per architecture, plus a separate generic one for UP builds) Also, i've enhanced the rwlock debugging facility, it will now track write-owners. There is new spinlock-owner/CPU-tracking on SMP builds too. All locks have lockup detection now, which will work for both soft and hard spin/rwlock lockups. The arch-level include files now only contain the minimally necessary subset of the spinlock code - all the rest that can be generalized now lives in the generic headers: include/asm-i386/spinlock_types.h | 16 include/asm-x86_64/spinlock_types.h | 16 I have also split up the various spinlock variants into separate files, making it easier to see which does what. The new layout is: SMP | UP ----------------------------|----------------------------------- asm/spinlock_types_smp.h | linux/spinlock_types_up.h linux/spinlock_types.h | linux/spinlock_types.h asm/spinlock_smp.h | linux/spinlock_up.h linux/spinlock_api_smp.h | linux/spinlock_api_up.h linux/spinlock.h | linux/spinlock.h /* * here's the role of the various spinlock/rwlock related include files: * * on SMP builds: * * asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the * initializers * * linux/spinlock_types.h: * defines the generic type and initializers * * asm/spinlock.h: contains the __raw_spin_*()/etc. lowlevel * implementations, mostly inline assembly code * * (also included on UP-debug builds:) * * linux/spinlock_api_smp.h: * contains the prototypes for the _spin_*() APIs. * * linux/spinlock.h: builds the final spin_*() APIs. * * on UP builds: * * linux/spinlock_type_up.h: * contains the generic, simplified UP spinlock type. * (which is an empty structure on non-debug builds) * * linux/spinlock_types.h: * defines the generic type and initializers * * linux/spinlock_up.h: * contains the __raw_spin_*()/etc. version of UP * builds. (which are NOPs on non-debug, non-preempt * builds) * * (included on UP-non-debug builds:) * * linux/spinlock_api_up.h: * builds the _spin_*() APIs. * * linux/spinlock.h: builds the final spin_*() APIs. */ All SMP and UP architectures are converted by this patch. arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via crosscompilers. m32r, mips, sh, sparc, have not been tested yet, but should be mostly fine. From: Grant Grundler <grundler@parisc-linux.org> Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU). Builds 32-bit SMP kernel (not booted or tested). I did not try to build non-SMP kernels. That should be trivial to fix up later if necessary. I converted bit ops atomic_hash lock to raw_spinlock_t. Doing so avoids some ugly nesting of linux/*.h and asm/*.h files. Those particular locks are well tested and contained entirely inside arch specific code. I do NOT expect any new issues to arise with them. If someone does ever need to use debug/metrics with them, then they will need to unravel this hairball between spinlocks, atomic ops, and bit ops that exist only because parisc has exactly one atomic instruction: LDCW (load and clear word). From: "Luck, Tony" <tony.luck@intel.com> ia64 fix Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjanv@infradead.org> Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Cc: Matthew Wilcox <willy@debian.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Mikael Pettersson <mikpe@csd.uu.se> Signed-off-by: Benoit Boissinot <benoit.boissinot@ens-lyon.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
520 lines
13 KiB
C
520 lines
13 KiB
C
#ifndef _PARISC_BITOPS_H
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#define _PARISC_BITOPS_H
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#include <linux/compiler.h>
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#include <asm/spinlock.h>
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#include <asm/byteorder.h>
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#include <asm/atomic.h>
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/*
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* HP-PARISC specific bit operations
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* for a detailed description of the functions please refer
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* to include/asm-i386/bitops.h or kerneldoc
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*/
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#ifdef __LP64__
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# define SHIFT_PER_LONG 6
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#ifndef BITS_PER_LONG
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# define BITS_PER_LONG 64
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#endif
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#else
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# define SHIFT_PER_LONG 5
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#ifndef BITS_PER_LONG
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# define BITS_PER_LONG 32
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#endif
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#endif
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#define CHOP_SHIFTCOUNT(x) ((x) & (BITS_PER_LONG - 1))
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#define smp_mb__before_clear_bit() smp_mb()
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#define smp_mb__after_clear_bit() smp_mb()
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static __inline__ void set_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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unsigned long flags;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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_atomic_spin_lock_irqsave(addr, flags);
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*addr |= mask;
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_atomic_spin_unlock_irqrestore(addr, flags);
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}
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static __inline__ void __set_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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*addr |= mask;
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}
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static __inline__ void clear_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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unsigned long flags;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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_atomic_spin_lock_irqsave(addr, flags);
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*addr &= ~mask;
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_atomic_spin_unlock_irqrestore(addr, flags);
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}
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static __inline__ void __clear_bit(unsigned long nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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*addr &= ~mask;
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}
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static __inline__ void change_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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unsigned long flags;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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_atomic_spin_lock_irqsave(addr, flags);
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*addr ^= mask;
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_atomic_spin_unlock_irqrestore(addr, flags);
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}
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static __inline__ void __change_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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*addr ^= mask;
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}
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static __inline__ int test_and_set_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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int oldbit;
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unsigned long flags;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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_atomic_spin_lock_irqsave(addr, flags);
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oldbit = (*addr & mask) ? 1 : 0;
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*addr |= mask;
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_atomic_spin_unlock_irqrestore(addr, flags);
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return oldbit;
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}
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static __inline__ int __test_and_set_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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int oldbit;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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oldbit = (*addr & mask) ? 1 : 0;
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*addr |= mask;
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return oldbit;
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}
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static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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int oldbit;
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unsigned long flags;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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_atomic_spin_lock_irqsave(addr, flags);
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oldbit = (*addr & mask) ? 1 : 0;
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*addr &= ~mask;
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_atomic_spin_unlock_irqrestore(addr, flags);
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return oldbit;
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}
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static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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int oldbit;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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oldbit = (*addr & mask) ? 1 : 0;
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*addr &= ~mask;
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return oldbit;
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}
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static __inline__ int test_and_change_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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int oldbit;
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unsigned long flags;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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_atomic_spin_lock_irqsave(addr, flags);
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oldbit = (*addr & mask) ? 1 : 0;
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*addr ^= mask;
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_atomic_spin_unlock_irqrestore(addr, flags);
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return oldbit;
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}
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static __inline__ int __test_and_change_bit(int nr, volatile unsigned long * address)
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{
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unsigned long mask;
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unsigned long *addr = (unsigned long *) address;
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int oldbit;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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oldbit = (*addr & mask) ? 1 : 0;
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*addr ^= mask;
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return oldbit;
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}
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static __inline__ int test_bit(int nr, const volatile unsigned long *address)
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{
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unsigned long mask;
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const unsigned long *addr = (const unsigned long *)address;
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addr += (nr >> SHIFT_PER_LONG);
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mask = 1L << CHOP_SHIFTCOUNT(nr);
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return !!(*addr & mask);
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}
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#ifdef __KERNEL__
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/**
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* __ffs - find first bit in word. returns 0 to "BITS_PER_LONG-1".
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* @word: The word to search
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*
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* __ffs() return is undefined if no bit is set.
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*
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* 32-bit fast __ffs by LaMont Jones "lamont At hp com".
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* 64-bit enhancement by Grant Grundler "grundler At parisc-linux org".
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* (with help from willy/jejb to get the semantics right)
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*
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* This algorithm avoids branches by making use of nullification.
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* One side effect of "extr" instructions is it sets PSW[N] bit.
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* How PSW[N] (nullify next insn) gets set is determined by the
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* "condition" field (eg "<>" or "TR" below) in the extr* insn.
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* Only the 1st and one of either the 2cd or 3rd insn will get executed.
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* Each set of 3 insn will get executed in 2 cycles on PA8x00 vs 16 or so
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* cycles for each mispredicted branch.
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*/
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static __inline__ unsigned long __ffs(unsigned long x)
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{
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unsigned long ret;
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__asm__(
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#if BITS_PER_LONG > 32
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" ldi 63,%1\n"
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" extrd,u,*<> %0,63,32,%%r0\n"
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" extrd,u,*TR %0,31,32,%0\n" /* move top 32-bits down */
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" addi -32,%1,%1\n"
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#else
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" ldi 31,%1\n"
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#endif
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" extru,<> %0,31,16,%%r0\n"
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" extru,TR %0,15,16,%0\n" /* xxxx0000 -> 0000xxxx */
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" addi -16,%1,%1\n"
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" extru,<> %0,31,8,%%r0\n"
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" extru,TR %0,23,8,%0\n" /* 0000xx00 -> 000000xx */
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" addi -8,%1,%1\n"
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" extru,<> %0,31,4,%%r0\n"
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" extru,TR %0,27,4,%0\n" /* 000000x0 -> 0000000x */
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" addi -4,%1,%1\n"
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" extru,<> %0,31,2,%%r0\n"
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" extru,TR %0,29,2,%0\n" /* 0000000y, 1100b -> 0011b */
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" addi -2,%1,%1\n"
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" extru,= %0,31,1,%%r0\n" /* check last bit */
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" addi -1,%1,%1\n"
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: "+r" (x), "=r" (ret) );
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return ret;
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}
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/* Undefined if no bit is zero. */
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#define ffz(x) __ffs(~x)
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/*
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* ffs: find first bit set. returns 1 to BITS_PER_LONG or 0 (if none set)
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* This is defined the same way as the libc and compiler builtin
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* ffs routines, therefore differs in spirit from the above ffz (man ffs).
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*/
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static __inline__ int ffs(int x)
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{
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return x ? (__ffs((unsigned long)x) + 1) : 0;
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}
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/*
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* fls: find last (most significant) bit set.
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* fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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static __inline__ int fls(int x)
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{
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int ret;
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if (!x)
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return 0;
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__asm__(
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" ldi 1,%1\n"
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" extru,<> %0,15,16,%%r0\n"
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" zdep,TR %0,15,16,%0\n" /* xxxx0000 */
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" addi 16,%1,%1\n"
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" extru,<> %0,7,8,%%r0\n"
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" zdep,TR %0,23,24,%0\n" /* xx000000 */
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" addi 8,%1,%1\n"
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" extru,<> %0,3,4,%%r0\n"
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" zdep,TR %0,27,28,%0\n" /* x0000000 */
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" addi 4,%1,%1\n"
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" extru,<> %0,1,2,%%r0\n"
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" zdep,TR %0,29,30,%0\n" /* y0000000 (y&3 = 0) */
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" addi 2,%1,%1\n"
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" extru,= %0,0,1,%%r0\n"
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" addi 1,%1,%1\n" /* if y & 8, add 1 */
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: "+r" (x), "=r" (ret) );
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return ret;
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}
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/*
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* hweightN: returns the hamming weight (i.e. the number
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* of bits set) of a N-bit word
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*/
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#define hweight64(x) \
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({ \
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unsigned long __x = (x); \
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unsigned int __w; \
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__w = generic_hweight32((unsigned int) __x); \
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__w += generic_hweight32((unsigned int) (__x>>32)); \
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__w; \
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})
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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/*
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* Every architecture must define this function. It's the fastest
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* way of searching a 140-bit bitmap where the first 100 bits are
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* unlikely to be set. It's guaranteed that at least one of the 140
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* bits is cleared.
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*/
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static inline int sched_find_first_bit(const unsigned long *b)
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{
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#ifndef __LP64__
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if (unlikely(b[0]))
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return __ffs(b[0]);
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if (unlikely(b[1]))
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return __ffs(b[1]) + 32;
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if (unlikely(b[2]))
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return __ffs(b[2]) + 64;
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if (b[3])
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return __ffs(b[3]) + 96;
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return __ffs(b[4]) + 128;
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#else
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if (unlikely(b[0]))
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return __ffs(b[0]);
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if (unlikely(((unsigned int)b[1])))
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return __ffs(b[1]) + 64;
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if (b[1] >> 32)
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return __ffs(b[1] >> 32) + 96;
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return __ffs(b[2]) + 128;
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#endif
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}
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#endif /* __KERNEL__ */
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/*
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* This implementation of find_{first,next}_zero_bit was stolen from
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* Linus' asm-alpha/bitops.h.
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*/
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#define find_first_zero_bit(addr, size) \
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find_next_zero_bit((addr), (size), 0)
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static __inline__ unsigned long find_next_zero_bit(const void * addr, unsigned long size, unsigned long offset)
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{
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const unsigned long * p = ((unsigned long *) addr) + (offset >> SHIFT_PER_LONG);
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unsigned long result = offset & ~(BITS_PER_LONG-1);
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= (BITS_PER_LONG-1);
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if (offset) {
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tmp = *(p++);
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tmp |= ~0UL >> (BITS_PER_LONG-offset);
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if (size < BITS_PER_LONG)
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goto found_first;
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if (~tmp)
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goto found_middle;
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size -= BITS_PER_LONG;
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result += BITS_PER_LONG;
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}
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while (size & ~(BITS_PER_LONG -1)) {
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if (~(tmp = *(p++)))
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goto found_middle;
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result += BITS_PER_LONG;
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size -= BITS_PER_LONG;
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}
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if (!size)
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return result;
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tmp = *p;
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found_first:
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tmp |= ~0UL << size;
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found_middle:
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return result + ffz(tmp);
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}
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static __inline__ unsigned long find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset)
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{
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const unsigned long *p = addr + (offset >> 6);
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unsigned long result = offset & ~(BITS_PER_LONG-1);
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unsigned long tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= (BITS_PER_LONG-1);
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if (offset) {
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tmp = *(p++);
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tmp &= (~0UL << offset);
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if (size < BITS_PER_LONG)
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goto found_first;
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if (tmp)
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goto found_middle;
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size -= BITS_PER_LONG;
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result += BITS_PER_LONG;
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}
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while (size & ~(BITS_PER_LONG-1)) {
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if ((tmp = *(p++)))
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goto found_middle;
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result += BITS_PER_LONG;
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size -= BITS_PER_LONG;
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}
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if (!size)
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return result;
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tmp = *p;
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found_first:
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tmp &= (~0UL >> (BITS_PER_LONG - size));
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if (tmp == 0UL) /* Are any bits set? */
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return result + size; /* Nope. */
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found_middle:
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return result + __ffs(tmp);
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}
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/**
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* find_first_bit - find the first set bit in a memory region
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* @addr: The address to start the search at
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* @size: The maximum size to search
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*
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* Returns the bit-number of the first set bit, not the number of the byte
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* containing a bit.
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*/
|
|
#define find_first_bit(addr, size) \
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|
find_next_bit((addr), (size), 0)
|
|
|
|
#define _EXT2_HAVE_ASM_BITOPS_
|
|
|
|
#ifdef __KERNEL__
|
|
/*
|
|
* test_and_{set,clear}_bit guarantee atomicity without
|
|
* disabling interrupts.
|
|
*/
|
|
#ifdef __LP64__
|
|
#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x38, (unsigned long *)addr)
|
|
#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x38, (unsigned long *)addr)
|
|
#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x38, (unsigned long *)addr)
|
|
#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x38, (unsigned long *)addr)
|
|
#else
|
|
#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x18, (unsigned long *)addr)
|
|
#define ext2_set_bit_atomic(l,nr,addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)addr)
|
|
#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x18, (unsigned long *)addr)
|
|
#define ext2_clear_bit_atomic(l,nr,addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)addr)
|
|
#endif
|
|
|
|
#endif /* __KERNEL__ */
|
|
|
|
static __inline__ int ext2_test_bit(int nr, __const__ void * addr)
|
|
{
|
|
__const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
|
|
|
|
return (ADDR[nr >> 3] >> (nr & 7)) & 1;
|
|
}
|
|
|
|
/*
|
|
* This implementation of ext2_find_{first,next}_zero_bit was stolen from
|
|
* Linus' asm-alpha/bitops.h and modified for a big-endian machine.
|
|
*/
|
|
|
|
#define ext2_find_first_zero_bit(addr, size) \
|
|
ext2_find_next_zero_bit((addr), (size), 0)
|
|
|
|
extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr,
|
|
unsigned long size, unsigned long offset)
|
|
{
|
|
unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
|
|
unsigned int result = offset & ~31UL;
|
|
unsigned int tmp;
|
|
|
|
if (offset >= size)
|
|
return size;
|
|
size -= result;
|
|
offset &= 31UL;
|
|
if (offset) {
|
|
tmp = cpu_to_le32p(p++);
|
|
tmp |= ~0UL >> (32-offset);
|
|
if (size < 32)
|
|
goto found_first;
|
|
if (tmp != ~0U)
|
|
goto found_middle;
|
|
size -= 32;
|
|
result += 32;
|
|
}
|
|
while (size >= 32) {
|
|
if ((tmp = cpu_to_le32p(p++)) != ~0U)
|
|
goto found_middle;
|
|
result += 32;
|
|
size -= 32;
|
|
}
|
|
if (!size)
|
|
return result;
|
|
tmp = cpu_to_le32p(p);
|
|
found_first:
|
|
tmp |= ~0U << size;
|
|
found_middle:
|
|
return result + ffz(tmp);
|
|
}
|
|
|
|
/* Bitmap functions for the minix filesystem. */
|
|
#define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr)
|
|
#define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr))
|
|
#define minix_test_and_clear_bit(nr,addr) ext2_clear_bit(nr,addr)
|
|
#define minix_test_bit(nr,addr) ext2_test_bit(nr,addr)
|
|
#define minix_find_first_zero_bit(addr,size) ext2_find_first_zero_bit(addr,size)
|
|
|
|
#endif /* _PARISC_BITOPS_H */
|