f80dff9da0
get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
32 lines
1,022 B
ArmAsm
32 lines
1,022 B
ArmAsm
/*
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* include/asm-arm/arch-at91rm9200/entry-macro.S
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*
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* Copyright (C) 2003-2005 SAN People
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*
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* Low-level IRQ helper macros for AT91RM9200 platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/hardware.h>
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#include <asm/arch/at91_aic.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =(AT91_VA_BASE_SYS) @ base virtual address of SYS peripherals
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ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
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ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
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teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt
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streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now.
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.endm
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