cc3a1378b4
This reverts commit 6c723d5bd8
.
It caused build errors on non-x86 platforms, config file confusion, and
even some boot errors on some x86-64 boxes. All around, not quite ready
for prime-time :(
Cc: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
714 lines
18 KiB
C
714 lines
18 KiB
C
/*
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* drivers/pci/pci-sysfs.c
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*
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* (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
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* (C) Copyright 2002-2004 IBM Corp.
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* (C) Copyright 2003 Matthew Wilcox
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* (C) Copyright 2003 Hewlett-Packard
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* (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
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* (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
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*
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* File attributes for PCI devices
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*
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* Modeled after usb's driverfs.c
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*
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/stat.h>
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#include <linux/topology.h>
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#include <linux/mm.h>
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#include <linux/capability.h>
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#include "pci.h"
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static int sysfs_initialized; /* = 0 */
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/* show configuration fields */
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#define pci_config_attr(field, format_string) \
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static ssize_t \
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field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
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{ \
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struct pci_dev *pdev; \
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\
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pdev = to_pci_dev (dev); \
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return sprintf (buf, format_string, pdev->field); \
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}
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pci_config_attr(vendor, "0x%04x\n");
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pci_config_attr(device, "0x%04x\n");
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pci_config_attr(subsystem_vendor, "0x%04x\n");
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pci_config_attr(subsystem_device, "0x%04x\n");
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pci_config_attr(class, "0x%06x\n");
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pci_config_attr(irq, "%u\n");
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static ssize_t broken_parity_status_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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return sprintf (buf, "%u\n", pdev->broken_parity_status);
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}
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static ssize_t broken_parity_status_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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ssize_t consumed = -EINVAL;
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if ((count > 0) && (*buf == '0' || *buf == '1')) {
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pdev->broken_parity_status = *buf == '1' ? 1 : 0;
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consumed = count;
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}
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return consumed;
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}
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static ssize_t local_cpus_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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cpumask_t mask;
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int len;
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mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
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len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
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strcat(buf,"\n");
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return 1+len;
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}
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/* show resources */
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static ssize_t
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resource_show(struct device * dev, struct device_attribute *attr, char * buf)
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{
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struct pci_dev * pci_dev = to_pci_dev(dev);
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char * str = buf;
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int i;
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int max = 7;
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resource_size_t start, end;
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if (pci_dev->subordinate)
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max = DEVICE_COUNT_RESOURCE;
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for (i = 0; i < max; i++) {
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struct resource *res = &pci_dev->resource[i];
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pci_resource_to_user(pci_dev, i, res, &start, &end);
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str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
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(unsigned long long)start,
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(unsigned long long)end,
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(unsigned long long)res->flags);
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}
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return (str - buf);
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}
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static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct pci_dev *pci_dev = to_pci_dev(dev);
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return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
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pci_dev->vendor, pci_dev->device,
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pci_dev->subsystem_vendor, pci_dev->subsystem_device,
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(u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
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(u8)(pci_dev->class));
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}
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static ssize_t is_enabled_store(struct device *dev,
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struct device_attribute *attr, const char *buf,
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size_t count)
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{
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ssize_t result = -EINVAL;
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struct pci_dev *pdev = to_pci_dev(dev);
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/* this can crash the machine when done on the "wrong" device */
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if (!capable(CAP_SYS_ADMIN))
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return count;
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if (*buf == '0') {
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if (atomic_read(&pdev->enable_cnt) != 0)
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pci_disable_device(pdev);
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else
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result = -EIO;
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} else if (*buf == '1')
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result = pci_enable_device(pdev);
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return result < 0 ? result : count;
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}
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static ssize_t is_enabled_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct pci_dev *pdev;
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pdev = to_pci_dev (dev);
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return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
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}
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#ifdef CONFIG_NUMA
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static ssize_t
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numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
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{
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return sprintf (buf, "%d\n", dev->numa_node);
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}
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#endif
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static ssize_t
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msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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if (!pdev->subordinate)
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return 0;
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return sprintf (buf, "%u\n",
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!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
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}
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static ssize_t
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msi_bus_store(struct device *dev, struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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/* bad things may happen if the no_msi flag is changed
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* while some drivers are loaded */
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if (!capable(CAP_SYS_ADMIN))
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return count;
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if (!pdev->subordinate)
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return count;
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if (*buf == '0') {
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pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
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dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
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" bad things could happen.\n");
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}
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if (*buf == '1') {
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pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
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dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
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" bad things could happen.\n");
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}
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return count;
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}
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struct device_attribute pci_dev_attrs[] = {
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__ATTR_RO(resource),
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__ATTR_RO(vendor),
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__ATTR_RO(device),
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__ATTR_RO(subsystem_vendor),
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__ATTR_RO(subsystem_device),
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__ATTR_RO(class),
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__ATTR_RO(irq),
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__ATTR_RO(local_cpus),
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__ATTR_RO(modalias),
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#ifdef CONFIG_NUMA
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__ATTR_RO(numa_node),
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#endif
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__ATTR(enable, 0600, is_enabled_show, is_enabled_store),
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__ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
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broken_parity_status_show,broken_parity_status_store),
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__ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
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__ATTR_NULL,
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};
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static ssize_t
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pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
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char *buf, loff_t off, size_t count)
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{
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struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
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unsigned int size = 64;
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loff_t init_off = off;
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u8 *data = (u8*) buf;
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/* Several chips lock up trying to read undefined config space */
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if (capable(CAP_SYS_ADMIN)) {
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size = dev->cfg_size;
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} else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
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size = 128;
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}
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if (off > size)
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return 0;
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if (off + count > size) {
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size -= off;
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count = size;
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} else {
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size = count;
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}
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if ((off & 1) && size) {
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u8 val;
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pci_user_read_config_byte(dev, off, &val);
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data[off - init_off] = val;
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off++;
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size--;
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}
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if ((off & 3) && size > 2) {
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u16 val;
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pci_user_read_config_word(dev, off, &val);
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data[off - init_off] = val & 0xff;
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data[off - init_off + 1] = (val >> 8) & 0xff;
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off += 2;
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size -= 2;
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}
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while (size > 3) {
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u32 val;
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pci_user_read_config_dword(dev, off, &val);
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data[off - init_off] = val & 0xff;
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data[off - init_off + 1] = (val >> 8) & 0xff;
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data[off - init_off + 2] = (val >> 16) & 0xff;
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data[off - init_off + 3] = (val >> 24) & 0xff;
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off += 4;
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size -= 4;
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}
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if (size >= 2) {
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u16 val;
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pci_user_read_config_word(dev, off, &val);
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data[off - init_off] = val & 0xff;
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data[off - init_off + 1] = (val >> 8) & 0xff;
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off += 2;
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size -= 2;
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}
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if (size > 0) {
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u8 val;
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pci_user_read_config_byte(dev, off, &val);
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data[off - init_off] = val;
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off++;
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--size;
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}
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return count;
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}
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static ssize_t
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pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
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char *buf, loff_t off, size_t count)
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{
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struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
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unsigned int size = count;
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loff_t init_off = off;
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u8 *data = (u8*) buf;
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if (off > dev->cfg_size)
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return 0;
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if (off + count > dev->cfg_size) {
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size = dev->cfg_size - off;
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count = size;
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}
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if ((off & 1) && size) {
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pci_user_write_config_byte(dev, off, data[off - init_off]);
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off++;
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size--;
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}
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if ((off & 3) && size > 2) {
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u16 val = data[off - init_off];
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val |= (u16) data[off - init_off + 1] << 8;
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pci_user_write_config_word(dev, off, val);
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off += 2;
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size -= 2;
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}
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while (size > 3) {
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u32 val = data[off - init_off];
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val |= (u32) data[off - init_off + 1] << 8;
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val |= (u32) data[off - init_off + 2] << 16;
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val |= (u32) data[off - init_off + 3] << 24;
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pci_user_write_config_dword(dev, off, val);
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off += 4;
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size -= 4;
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}
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if (size >= 2) {
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u16 val = data[off - init_off];
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val |= (u16) data[off - init_off + 1] << 8;
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pci_user_write_config_word(dev, off, val);
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off += 2;
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size -= 2;
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}
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if (size) {
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pci_user_write_config_byte(dev, off, data[off - init_off]);
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off++;
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--size;
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}
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return count;
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}
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#ifdef HAVE_PCI_LEGACY
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/**
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* pci_read_legacy_io - read byte(s) from legacy I/O port space
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* @kobj: kobject corresponding to file to read from
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* @buf: buffer to store results
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* @off: offset into legacy I/O port space
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* @count: number of bytes to read
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*
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* Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
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* callback routine (pci_legacy_read).
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*/
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ssize_t
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pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
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char *buf, loff_t off, size_t count)
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{
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struct pci_bus *bus = to_pci_bus(container_of(kobj,
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struct device,
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kobj));
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/* Only support 1, 2 or 4 byte accesses */
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if (count != 1 && count != 2 && count != 4)
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return -EINVAL;
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return pci_legacy_read(bus, off, (u32 *)buf, count);
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}
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/**
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* pci_write_legacy_io - write byte(s) to legacy I/O port space
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* @kobj: kobject corresponding to file to read from
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* @buf: buffer containing value to be written
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* @off: offset into legacy I/O port space
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* @count: number of bytes to write
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*
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* Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
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* callback routine (pci_legacy_write).
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*/
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ssize_t
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pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
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char *buf, loff_t off, size_t count)
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{
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struct pci_bus *bus = to_pci_bus(container_of(kobj,
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struct device,
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kobj));
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/* Only support 1, 2 or 4 byte accesses */
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if (count != 1 && count != 2 && count != 4)
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return -EINVAL;
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return pci_legacy_write(bus, off, *(u32 *)buf, count);
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}
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/**
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* pci_mmap_legacy_mem - map legacy PCI memory into user memory space
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* @kobj: kobject corresponding to device to be mapped
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* @attr: struct bin_attribute for this file
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* @vma: struct vm_area_struct passed to mmap
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*
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* Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
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* legacy memory space (first meg of bus space) into application virtual
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* memory space.
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*/
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int
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pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
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struct vm_area_struct *vma)
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{
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struct pci_bus *bus = to_pci_bus(container_of(kobj,
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struct device,
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kobj));
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return pci_mmap_legacy_page_range(bus, vma);
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}
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#endif /* HAVE_PCI_LEGACY */
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#ifdef HAVE_PCI_MMAP
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/**
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* pci_mmap_resource - map a PCI resource into user memory space
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* @kobj: kobject for mapping
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* @attr: struct bin_attribute for the file being mapped
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* @vma: struct vm_area_struct passed into the mmap
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*
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* Use the regular PCI mapping routines to map a PCI resource into userspace.
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* FIXME: write combining? maybe automatic for prefetchable regions?
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*/
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static int
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pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
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struct vm_area_struct *vma)
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{
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struct pci_dev *pdev = to_pci_dev(container_of(kobj,
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struct device, kobj));
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struct resource *res = (struct resource *)attr->private;
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enum pci_mmap_state mmap_type;
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resource_size_t start, end;
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int i;
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for (i = 0; i < PCI_ROM_RESOURCE; i++)
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if (res == &pdev->resource[i])
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break;
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if (i >= PCI_ROM_RESOURCE)
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return -ENODEV;
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/* pci_mmap_page_range() expects the same kind of entry as coming
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* from /proc/bus/pci/ which is a "user visible" value. If this is
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* different from the resource itself, arch will do necessary fixup.
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*/
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pci_resource_to_user(pdev, i, res, &start, &end);
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vma->vm_pgoff += start >> PAGE_SHIFT;
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mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
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return pci_mmap_page_range(pdev, vma, mmap_type, 0);
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}
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/**
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* pci_remove_resource_files - cleanup resource files
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* @dev: dev to cleanup
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*
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* If we created resource files for @dev, remove them from sysfs and
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* free their resources.
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*/
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static void
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pci_remove_resource_files(struct pci_dev *pdev)
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{
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int i;
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for (i = 0; i < PCI_ROM_RESOURCE; i++) {
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struct bin_attribute *res_attr;
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res_attr = pdev->res_attr[i];
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if (res_attr) {
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sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
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kfree(res_attr);
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}
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}
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}
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/**
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* pci_create_resource_files - create resource files in sysfs for @dev
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* @dev: dev in question
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*
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* Walk the resources in @dev creating files for each resource available.
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*/
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static int pci_create_resource_files(struct pci_dev *pdev)
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{
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int i;
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int retval;
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/* Expose the PCI resources from this device as files */
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for (i = 0; i < PCI_ROM_RESOURCE; i++) {
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struct bin_attribute *res_attr;
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/* skip empty resources */
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if (!pci_resource_len(pdev, i))
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continue;
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/* allocate attribute structure, piggyback attribute name */
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res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
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if (res_attr) {
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char *res_attr_name = (char *)(res_attr + 1);
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pdev->res_attr[i] = res_attr;
|
|
sprintf(res_attr_name, "resource%d", i);
|
|
res_attr->attr.name = res_attr_name;
|
|
res_attr->attr.mode = S_IRUSR | S_IWUSR;
|
|
res_attr->size = pci_resource_len(pdev, i);
|
|
res_attr->mmap = pci_mmap_resource;
|
|
res_attr->private = &pdev->resource[i];
|
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
|
|
if (retval) {
|
|
pci_remove_resource_files(pdev);
|
|
return retval;
|
|
}
|
|
} else {
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
#else /* !HAVE_PCI_MMAP */
|
|
static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
|
|
static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
|
|
#endif /* HAVE_PCI_MMAP */
|
|
|
|
/**
|
|
* pci_write_rom - used to enable access to the PCI ROM display
|
|
* @kobj: kernel object handle
|
|
* @buf: user input
|
|
* @off: file offset
|
|
* @count: number of byte in input
|
|
*
|
|
* writing anything except 0 enables it
|
|
*/
|
|
static ssize_t
|
|
pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
|
|
char *buf, loff_t off, size_t count)
|
|
{
|
|
struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
|
|
|
|
if ((off == 0) && (*buf == '0') && (count == 2))
|
|
pdev->rom_attr_enabled = 0;
|
|
else
|
|
pdev->rom_attr_enabled = 1;
|
|
|
|
return count;
|
|
}
|
|
|
|
/**
|
|
* pci_read_rom - read a PCI ROM
|
|
* @kobj: kernel object handle
|
|
* @buf: where to put the data we read from the ROM
|
|
* @off: file offset
|
|
* @count: number of bytes to read
|
|
*
|
|
* Put @count bytes starting at @off into @buf from the ROM in the PCI
|
|
* device corresponding to @kobj.
|
|
*/
|
|
static ssize_t
|
|
pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
|
|
char *buf, loff_t off, size_t count)
|
|
{
|
|
struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
|
|
void __iomem *rom;
|
|
size_t size;
|
|
|
|
if (!pdev->rom_attr_enabled)
|
|
return -EINVAL;
|
|
|
|
rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
|
|
if (!rom)
|
|
return 0;
|
|
|
|
if (off >= size)
|
|
count = 0;
|
|
else {
|
|
if (off + count > size)
|
|
count = size - off;
|
|
|
|
memcpy_fromio(buf, rom + off, count);
|
|
}
|
|
pci_unmap_rom(pdev, rom);
|
|
|
|
return count;
|
|
}
|
|
|
|
static struct bin_attribute pci_config_attr = {
|
|
.attr = {
|
|
.name = "config",
|
|
.mode = S_IRUGO | S_IWUSR,
|
|
},
|
|
.size = 256,
|
|
.read = pci_read_config,
|
|
.write = pci_write_config,
|
|
};
|
|
|
|
static struct bin_attribute pcie_config_attr = {
|
|
.attr = {
|
|
.name = "config",
|
|
.mode = S_IRUGO | S_IWUSR,
|
|
},
|
|
.size = 4096,
|
|
.read = pci_read_config,
|
|
.write = pci_write_config,
|
|
};
|
|
|
|
int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
|
|
{
|
|
struct bin_attribute *rom_attr = NULL;
|
|
int retval;
|
|
|
|
if (!sysfs_initialized)
|
|
return -EACCES;
|
|
|
|
if (pdev->cfg_size < 4096)
|
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
|
|
else
|
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
|
|
if (retval)
|
|
goto err;
|
|
|
|
retval = pci_create_resource_files(pdev);
|
|
if (retval)
|
|
goto err_bin_file;
|
|
|
|
/* If the device has a ROM, try to expose it in sysfs. */
|
|
if (pci_resource_len(pdev, PCI_ROM_RESOURCE) ||
|
|
(pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)) {
|
|
rom_attr = kzalloc(sizeof(*rom_attr), GFP_ATOMIC);
|
|
if (rom_attr) {
|
|
pdev->rom_attr = rom_attr;
|
|
rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
|
|
rom_attr->attr.name = "rom";
|
|
rom_attr->attr.mode = S_IRUSR;
|
|
rom_attr->read = pci_read_rom;
|
|
rom_attr->write = pci_write_rom;
|
|
retval = sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
|
|
if (retval)
|
|
goto err_rom;
|
|
} else {
|
|
retval = -ENOMEM;
|
|
goto err_resource_files;
|
|
}
|
|
}
|
|
/* add platform-specific attributes */
|
|
if (pcibios_add_platform_entries(pdev))
|
|
goto err_rom_file;
|
|
|
|
return 0;
|
|
|
|
err_rom_file:
|
|
if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, rom_attr);
|
|
err_rom:
|
|
kfree(rom_attr);
|
|
err_resource_files:
|
|
pci_remove_resource_files(pdev);
|
|
err_bin_file:
|
|
if (pdev->cfg_size < 4096)
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
|
|
else
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
|
|
err:
|
|
return retval;
|
|
}
|
|
|
|
/**
|
|
* pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
|
|
* @pdev: device whose entries we should free
|
|
*
|
|
* Cleanup when @pdev is removed from sysfs.
|
|
*/
|
|
void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
|
|
{
|
|
if (!sysfs_initialized)
|
|
return;
|
|
|
|
if (pdev->cfg_size < 4096)
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
|
|
else
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
|
|
|
|
pci_remove_resource_files(pdev);
|
|
|
|
if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
|
|
if (pdev->rom_attr) {
|
|
sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
|
|
kfree(pdev->rom_attr);
|
|
}
|
|
}
|
|
}
|
|
|
|
static int __init pci_sysfs_init(void)
|
|
{
|
|
struct pci_dev *pdev = NULL;
|
|
int retval;
|
|
|
|
sysfs_initialized = 1;
|
|
for_each_pci_dev(pdev) {
|
|
retval = pci_create_sysfs_dev_files(pdev);
|
|
if (retval) {
|
|
pci_dev_put(pdev);
|
|
return retval;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
late_initcall(pci_sysfs_init);
|