8401707ff6
Support SMP for a Sparc-Leon multiprocessor system. Add Leon specific SMP code to arch/sparc/kernel/leon_smp.c. Signed-off-by: Konrad Eisele <konrad@gaisler.com> Signed-off-by: David S. Miller <davem@davemloft.net>
746 lines
20 KiB
C
746 lines
20 KiB
C
/*
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* ioport.c: Simple io mapping allocator.
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
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*
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* 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev.
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*
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* 2000/01/29
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* <rth> zait: as long as pci_alloc_consistent produces something addressable,
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* things are ok.
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* <zaitcev> rth: no, it is relevant, because get_free_pages returns you a
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* pointer into the big page mapping
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* <rth> zait: so what?
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* <rth> zait: remap_it_my_way(virt_to_phys(get_free_page()))
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* <zaitcev> Hmm
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* <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())).
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* So far so good.
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* <zaitcev> Now, driver calls pci_free_consistent(with result of
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* remap_it_my_way()).
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* <zaitcev> How do you find the address to pass to free_pages()?
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* <rth> zait: walk the page tables? It's only two or three level after all.
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* <rth> zait: you have to walk them anyway to remove the mapping.
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* <zaitcev> Hmm
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* <zaitcev> Sounds reasonable
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*/
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/pci.h> /* struct pci_dev */
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#include <linux/proc_fs.h>
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#include <linux/seq_file.h>
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#include <linux/scatterlist.h>
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#include <linux/of_device.h>
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#include <asm/io.h>
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#include <asm/vaddrs.h>
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#include <asm/oplib.h>
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#include <asm/prom.h>
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#include <asm/page.h>
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#include <asm/pgalloc.h>
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#include <asm/dma.h>
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#include <asm/iommu.h>
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#include <asm/io-unit.h>
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#include <asm/leon.h>
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#ifdef CONFIG_SPARC_LEON
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#define mmu_inval_dma_area(p, l) leon_flush_dcache_all()
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#else
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#define mmu_inval_dma_area(p, l) /* Anton pulled it out for 2.4.0-xx */
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#endif
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static struct resource *_sparc_find_resource(struct resource *r,
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unsigned long);
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static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
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static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
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unsigned long size, char *name);
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static void _sparc_free_io(struct resource *res);
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static void register_proc_sparc_ioport(void);
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/* This points to the next to use virtual memory for DVMA mappings */
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static struct resource _sparc_dvma = {
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.name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1
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};
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/* This points to the start of I/O mappings, cluable from outside. */
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/*ext*/ struct resource sparc_iomap = {
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.name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1
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};
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/*
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* Our mini-allocator...
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* Boy this is gross! We need it because we must map I/O for
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* timers and interrupt controller before the kmalloc is available.
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*/
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#define XNMLN 15
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#define XNRES 10 /* SS-10 uses 8 */
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struct xresource {
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struct resource xres; /* Must be first */
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int xflag; /* 1 == used */
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char xname[XNMLN+1];
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};
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static struct xresource xresv[XNRES];
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static struct xresource *xres_alloc(void) {
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struct xresource *xrp;
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int n;
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xrp = xresv;
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for (n = 0; n < XNRES; n++) {
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if (xrp->xflag == 0) {
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xrp->xflag = 1;
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return xrp;
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}
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xrp++;
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}
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return NULL;
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}
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static void xres_free(struct xresource *xrp) {
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xrp->xflag = 0;
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}
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/*
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* These are typically used in PCI drivers
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* which are trying to be cross-platform.
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*
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* Bus type is always zero on IIep.
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*/
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void __iomem *ioremap(unsigned long offset, unsigned long size)
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{
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char name[14];
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sprintf(name, "phys_%08x", (u32)offset);
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return _sparc_alloc_io(0, offset, size, name);
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}
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EXPORT_SYMBOL(ioremap);
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/*
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* Comlimentary to ioremap().
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*/
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void iounmap(volatile void __iomem *virtual)
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{
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unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
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struct resource *res;
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if ((res = _sparc_find_resource(&sparc_iomap, vaddr)) == NULL) {
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printk("free_io/iounmap: cannot free %lx\n", vaddr);
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return;
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}
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_sparc_free_io(res);
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if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) {
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xres_free((struct xresource *)res);
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} else {
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kfree(res);
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}
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}
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EXPORT_SYMBOL(iounmap);
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void __iomem *of_ioremap(struct resource *res, unsigned long offset,
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unsigned long size, char *name)
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{
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return _sparc_alloc_io(res->flags & 0xF,
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res->start + offset,
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size, name);
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}
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EXPORT_SYMBOL(of_ioremap);
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void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
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{
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iounmap(base);
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}
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EXPORT_SYMBOL(of_iounmap);
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/*
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* Meat of mapping
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*/
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static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
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unsigned long size, char *name)
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{
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static int printed_full;
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struct xresource *xres;
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struct resource *res;
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char *tack;
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int tlen;
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void __iomem *va; /* P3 diag */
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if (name == NULL) name = "???";
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if ((xres = xres_alloc()) != 0) {
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tack = xres->xname;
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res = &xres->xres;
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} else {
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if (!printed_full) {
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printk("ioremap: done with statics, switching to malloc\n");
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printed_full = 1;
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}
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tlen = strlen(name);
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tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
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if (tack == NULL) return NULL;
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memset(tack, 0, sizeof(struct resource));
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res = (struct resource *) tack;
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tack += sizeof (struct resource);
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}
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strlcpy(tack, name, XNMLN+1);
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res->name = tack;
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va = _sparc_ioremap(res, busno, phys, size);
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/* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */
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return va;
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}
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/*
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*/
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static void __iomem *
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_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)
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{
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unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
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if (allocate_resource(&sparc_iomap, res,
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(offset + sz + PAGE_SIZE-1) & PAGE_MASK,
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sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) {
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/* Usually we cannot see printks in this case. */
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prom_printf("alloc_io_res(%s): cannot occupy\n",
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(res->name != NULL)? res->name: "???");
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prom_halt();
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}
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pa &= PAGE_MASK;
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sparc_mapiorange(bus, pa, res->start, res->end - res->start + 1);
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return (void __iomem *)(unsigned long)(res->start + offset);
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}
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/*
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* Comlimentary to _sparc_ioremap().
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*/
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static void _sparc_free_io(struct resource *res)
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{
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unsigned long plen;
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plen = res->end - res->start + 1;
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BUG_ON((plen & (PAGE_SIZE-1)) != 0);
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sparc_unmapiorange(res->start, plen);
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release_resource(res);
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}
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#ifdef CONFIG_SBUS
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void sbus_set_sbus64(struct device *dev, int x)
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{
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printk("sbus_set_sbus64: unsupported\n");
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}
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EXPORT_SYMBOL(sbus_set_sbus64);
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/*
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* Allocate a chunk of memory suitable for DMA.
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* Typically devices use them for control blocks.
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* CPU may access them without any explicit flushing.
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*/
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static void *sbus_alloc_coherent(struct device *dev, size_t len,
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dma_addr_t *dma_addrp, gfp_t gfp)
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{
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struct of_device *op = to_of_device(dev);
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unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK;
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unsigned long va;
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struct resource *res;
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int order;
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/* XXX why are some lengths signed, others unsigned? */
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if (len <= 0) {
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return NULL;
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}
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (len > 256*1024) { /* __get_free_pages() limit */
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return NULL;
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}
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order = get_order(len_total);
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if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0)
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goto err_nopages;
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if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL)
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goto err_nomem;
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if (allocate_resource(&_sparc_dvma, res, len_total,
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_sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
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printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
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goto err_nova;
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}
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mmu_inval_dma_area(va, len_total);
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// XXX The mmu_map_dma_area does this for us below, see comments.
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// sparc_mapiorange(0, virt_to_phys(va), res->start, len_total);
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/*
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* XXX That's where sdev would be used. Currently we load
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* all iommu tables with the same translations.
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*/
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if (mmu_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
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goto err_noiommu;
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res->name = op->node->name;
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return (void *)(unsigned long)res->start;
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err_noiommu:
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release_resource(res);
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err_nova:
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free_pages(va, order);
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err_nomem:
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kfree(res);
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err_nopages:
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return NULL;
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}
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static void sbus_free_coherent(struct device *dev, size_t n, void *p,
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dma_addr_t ba)
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{
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struct resource *res;
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struct page *pgv;
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if ((res = _sparc_find_resource(&_sparc_dvma,
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(unsigned long)p)) == NULL) {
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printk("sbus_free_consistent: cannot free %p\n", p);
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return;
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}
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if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
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printk("sbus_free_consistent: unaligned va %p\n", p);
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return;
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}
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n = (n + PAGE_SIZE-1) & PAGE_MASK;
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if ((res->end-res->start)+1 != n) {
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printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
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(long)((res->end-res->start)+1), n);
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return;
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}
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release_resource(res);
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kfree(res);
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/* mmu_inval_dma_area(va, n); */ /* it's consistent, isn't it */
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pgv = virt_to_page(p);
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mmu_unmap_dma_area(dev, ba, n);
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__free_pages(pgv, get_order(n));
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}
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/*
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* Map a chunk of memory so that devices can see it.
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* CPU view of this memory may be inconsistent with
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* a device view and explicit flushing is necessary.
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*/
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static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t len,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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void *va = page_address(page) + offset;
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/* XXX why are some lengths signed, others unsigned? */
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if (len <= 0) {
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return 0;
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}
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/* XXX So what is maxphys for us and how do drivers know it? */
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if (len > 256*1024) { /* __get_free_pages() limit */
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return 0;
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}
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return mmu_get_scsi_one(dev, va, len);
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}
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static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
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enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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mmu_release_scsi_one(dev, ba, n);
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}
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static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
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enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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mmu_get_scsi_sgl(dev, sg, n);
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/*
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* XXX sparc64 can return a partial length here. sun4c should do this
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* but it currently panics if it can't fulfill the request - Anton
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*/
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return n;
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}
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static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
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enum dma_data_direction dir, struct dma_attrs *attrs)
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{
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mmu_release_scsi_sgl(dev, sg, n);
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}
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static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int n, enum dma_data_direction dir)
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{
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BUG();
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}
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static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int n, enum dma_data_direction dir)
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{
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BUG();
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}
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struct dma_map_ops sbus_dma_ops = {
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.alloc_coherent = sbus_alloc_coherent,
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.free_coherent = sbus_free_coherent,
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.map_page = sbus_map_page,
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.unmap_page = sbus_unmap_page,
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.map_sg = sbus_map_sg,
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.unmap_sg = sbus_unmap_sg,
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.sync_sg_for_cpu = sbus_sync_sg_for_cpu,
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.sync_sg_for_device = sbus_sync_sg_for_device,
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};
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struct dma_map_ops *dma_ops = &sbus_dma_ops;
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EXPORT_SYMBOL(dma_ops);
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static int __init sparc_register_ioport(void)
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{
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register_proc_sparc_ioport();
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return 0;
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}
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arch_initcall(sparc_register_ioport);
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#endif /* CONFIG_SBUS */
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#ifdef CONFIG_PCI
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/* Allocate and map kernel buffer using consistent mode DMA for a device.
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* hwdev should be valid struct pci_dev pointer for PCI devices.
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*/
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static void *pci32_alloc_coherent(struct device *dev, size_t len,
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dma_addr_t *pba, gfp_t gfp)
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{
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unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK;
|
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unsigned long va;
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struct resource *res;
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int order;
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if (len == 0) {
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return NULL;
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}
|
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if (len > 256*1024) { /* __get_free_pages() limit */
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return NULL;
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}
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|
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order = get_order(len_total);
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va = __get_free_pages(GFP_KERNEL, order);
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if (va == 0) {
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printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
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return NULL;
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}
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if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
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free_pages(va, order);
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printk("pci_alloc_consistent: no core\n");
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return NULL;
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}
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|
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if (allocate_resource(&_sparc_dvma, res, len_total,
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_sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
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printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
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free_pages(va, order);
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kfree(res);
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return NULL;
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}
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mmu_inval_dma_area(va, len_total);
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#if 0
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/* P3 */ printk("pci_alloc_consistent: kva %lx uncva %lx phys %lx size %lx\n",
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(long)va, (long)res->start, (long)virt_to_phys(va), len_total);
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#endif
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sparc_mapiorange(0, virt_to_phys(va), res->start, len_total);
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*pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
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return (void *) res->start;
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}
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|
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/* Free and unmap a consistent DMA buffer.
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* cpu_addr is what was returned from pci_alloc_consistent,
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* size must be the same as what as passed into pci_alloc_consistent,
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* and likewise dma_addr must be the same as what *dma_addrp was set to.
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*
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* References to the memory and mappings associated with cpu_addr/dma_addr
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* past this call are illegal.
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*/
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static void pci32_free_coherent(struct device *dev, size_t n, void *p,
|
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dma_addr_t ba)
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{
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struct resource *res;
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unsigned long pgp;
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|
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if ((res = _sparc_find_resource(&_sparc_dvma,
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(unsigned long)p)) == NULL) {
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printk("pci_free_consistent: cannot free %p\n", p);
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return;
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}
|
|
|
|
if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
|
|
printk("pci_free_consistent: unaligned va %p\n", p);
|
|
return;
|
|
}
|
|
|
|
n = (n + PAGE_SIZE-1) & PAGE_MASK;
|
|
if ((res->end-res->start)+1 != n) {
|
|
printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
|
|
(long)((res->end-res->start)+1), (long)n);
|
|
return;
|
|
}
|
|
|
|
pgp = (unsigned long) phys_to_virt(ba); /* bus_to_virt actually */
|
|
mmu_inval_dma_area(pgp, n);
|
|
sparc_unmapiorange((unsigned long)p, n);
|
|
|
|
release_resource(res);
|
|
kfree(res);
|
|
|
|
free_pages(pgp, get_order(n));
|
|
}
|
|
|
|
/*
|
|
* Same as pci_map_single, but with pages.
|
|
*/
|
|
static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
|
|
unsigned long offset, size_t size,
|
|
enum dma_data_direction dir,
|
|
struct dma_attrs *attrs)
|
|
{
|
|
/* IIep is write-through, not flushing. */
|
|
return page_to_phys(page) + offset;
|
|
}
|
|
|
|
/* Map a set of buffers described by scatterlist in streaming
|
|
* mode for DMA. This is the scather-gather version of the
|
|
* above pci_map_single interface. Here the scatter gather list
|
|
* elements are each tagged with the appropriate dma address
|
|
* and length. They are obtained via sg_dma_{address,length}(SG).
|
|
*
|
|
* NOTE: An implementation may be able to use a smaller number of
|
|
* DMA address/length pairs than there are SG table elements.
|
|
* (for example via virtual mapping capabilities)
|
|
* The routine returns the number of addr/length pairs actually
|
|
* used, at most nents.
|
|
*
|
|
* Device ownership issues as mentioned above for pci_map_single are
|
|
* the same here.
|
|
*/
|
|
static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
|
|
int nents, enum dma_data_direction dir,
|
|
struct dma_attrs *attrs)
|
|
{
|
|
struct scatterlist *sg;
|
|
int n;
|
|
|
|
/* IIep is write-through, not flushing. */
|
|
for_each_sg(sgl, sg, nents, n) {
|
|
BUG_ON(page_address(sg_page(sg)) == NULL);
|
|
sg->dma_address = virt_to_phys(sg_virt(sg));
|
|
sg->dma_length = sg->length;
|
|
}
|
|
return nents;
|
|
}
|
|
|
|
/* Unmap a set of streaming mode DMA translations.
|
|
* Again, cpu read rules concerning calls here are the same as for
|
|
* pci_unmap_single() above.
|
|
*/
|
|
static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
|
|
int nents, enum dma_data_direction dir,
|
|
struct dma_attrs *attrs)
|
|
{
|
|
struct scatterlist *sg;
|
|
int n;
|
|
|
|
if (dir != PCI_DMA_TODEVICE) {
|
|
for_each_sg(sgl, sg, nents, n) {
|
|
BUG_ON(page_address(sg_page(sg)) == NULL);
|
|
mmu_inval_dma_area(
|
|
(unsigned long) page_address(sg_page(sg)),
|
|
(sg->length + PAGE_SIZE-1) & PAGE_MASK);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Make physical memory consistent for a single
|
|
* streaming mode DMA translation before or after a transfer.
|
|
*
|
|
* If you perform a pci_map_single() but wish to interrogate the
|
|
* buffer using the cpu, yet do not wish to teardown the PCI dma
|
|
* mapping, you must call this function before doing so. At the
|
|
* next point you give the PCI dma address back to the card, you
|
|
* must first perform a pci_dma_sync_for_device, and then the
|
|
* device again owns the buffer.
|
|
*/
|
|
static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
if (dir != PCI_DMA_TODEVICE) {
|
|
mmu_inval_dma_area((unsigned long)phys_to_virt(ba),
|
|
(size + PAGE_SIZE-1) & PAGE_MASK);
|
|
}
|
|
}
|
|
|
|
static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
if (dir != PCI_DMA_TODEVICE) {
|
|
mmu_inval_dma_area((unsigned long)phys_to_virt(ba),
|
|
(size + PAGE_SIZE-1) & PAGE_MASK);
|
|
}
|
|
}
|
|
|
|
/* Make physical memory consistent for a set of streaming
|
|
* mode DMA translations after a transfer.
|
|
*
|
|
* The same as pci_dma_sync_single_* but for a scatter-gather list,
|
|
* same rules and usage.
|
|
*/
|
|
static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
|
|
int nents, enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *sg;
|
|
int n;
|
|
|
|
if (dir != PCI_DMA_TODEVICE) {
|
|
for_each_sg(sgl, sg, nents, n) {
|
|
BUG_ON(page_address(sg_page(sg)) == NULL);
|
|
mmu_inval_dma_area(
|
|
(unsigned long) page_address(sg_page(sg)),
|
|
(sg->length + PAGE_SIZE-1) & PAGE_MASK);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
|
|
int nents, enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *sg;
|
|
int n;
|
|
|
|
if (dir != PCI_DMA_TODEVICE) {
|
|
for_each_sg(sgl, sg, nents, n) {
|
|
BUG_ON(page_address(sg_page(sg)) == NULL);
|
|
mmu_inval_dma_area(
|
|
(unsigned long) page_address(sg_page(sg)),
|
|
(sg->length + PAGE_SIZE-1) & PAGE_MASK);
|
|
}
|
|
}
|
|
}
|
|
|
|
struct dma_map_ops pci32_dma_ops = {
|
|
.alloc_coherent = pci32_alloc_coherent,
|
|
.free_coherent = pci32_free_coherent,
|
|
.map_page = pci32_map_page,
|
|
.map_sg = pci32_map_sg,
|
|
.unmap_sg = pci32_unmap_sg,
|
|
.sync_single_for_cpu = pci32_sync_single_for_cpu,
|
|
.sync_single_for_device = pci32_sync_single_for_device,
|
|
.sync_sg_for_cpu = pci32_sync_sg_for_cpu,
|
|
.sync_sg_for_device = pci32_sync_sg_for_device,
|
|
};
|
|
EXPORT_SYMBOL(pci32_dma_ops);
|
|
|
|
#endif /* CONFIG_PCI */
|
|
|
|
/*
|
|
* Return whether the given PCI device DMA address mask can be
|
|
* supported properly. For example, if your device can only drive the
|
|
* low 24-bits during PCI bus mastering, then you would pass
|
|
* 0x00ffffff as the mask to this function.
|
|
*/
|
|
int dma_supported(struct device *dev, u64 mask)
|
|
{
|
|
#ifdef CONFIG_PCI
|
|
if (dev->bus == &pci_bus_type)
|
|
return 1;
|
|
#endif
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(dma_supported);
|
|
|
|
int dma_set_mask(struct device *dev, u64 dma_mask)
|
|
{
|
|
#ifdef CONFIG_PCI
|
|
if (dev->bus == &pci_bus_type)
|
|
return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
|
|
#endif
|
|
return -EOPNOTSUPP;
|
|
}
|
|
EXPORT_SYMBOL(dma_set_mask);
|
|
|
|
|
|
#ifdef CONFIG_PROC_FS
|
|
|
|
static int sparc_io_proc_show(struct seq_file *m, void *v)
|
|
{
|
|
struct resource *root = m->private, *r;
|
|
const char *nm;
|
|
|
|
for (r = root->child; r != NULL; r = r->sibling) {
|
|
if ((nm = r->name) == 0) nm = "???";
|
|
seq_printf(m, "%016llx-%016llx: %s\n",
|
|
(unsigned long long)r->start,
|
|
(unsigned long long)r->end, nm);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sparc_io_proc_open(struct inode *inode, struct file *file)
|
|
{
|
|
return single_open(file, sparc_io_proc_show, PDE(inode)->data);
|
|
}
|
|
|
|
static const struct file_operations sparc_io_proc_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = sparc_io_proc_open,
|
|
.read = seq_read,
|
|
.llseek = seq_lseek,
|
|
.release = single_release,
|
|
};
|
|
#endif /* CONFIG_PROC_FS */
|
|
|
|
/*
|
|
* This is a version of find_resource and it belongs to kernel/resource.c.
|
|
* Until we have agreement with Linus and Martin, it lingers here.
|
|
*
|
|
* XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
|
|
* This probably warrants some sort of hashing.
|
|
*/
|
|
static struct resource *_sparc_find_resource(struct resource *root,
|
|
unsigned long hit)
|
|
{
|
|
struct resource *tmp;
|
|
|
|
for (tmp = root->child; tmp != 0; tmp = tmp->sibling) {
|
|
if (tmp->start <= hit && tmp->end >= hit)
|
|
return tmp;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
static void register_proc_sparc_ioport(void)
|
|
{
|
|
#ifdef CONFIG_PROC_FS
|
|
proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap);
|
|
proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma);
|
|
#endif
|
|
}
|