3bf34666a0
The CLK_GATE_IP_ACP register offset is incorrectly listed making definition of g2d clock incorrect, which may lead to system failures when trying to use G2D on systems on which firmware gates this clock by default. Fix this and the register ordering as well. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> [t.figa: Updated patch description.] Signed-off-by: Tomasz Figa <t.figa@samsung.com> |
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| .. | ||
| clk-exynos-audss.c | ||
| clk-exynos4.c | ||
| clk-exynos5250.c | ||
| clk-exynos5420.c | ||
| clk-exynos5440.c | ||
| clk-pll.c | ||
| clk-pll.h | ||
| clk-s3c64xx.c | ||
| clk.c | ||
| clk.h | ||
| Makefile | ||