ca05fea6db
This patch is per Andi's request to remove NO_IOAPIC_CHECK from genapic and use heuristics to prevent unique I/O APIC ID check for systems that don't need it. The patch disables unique I/O APIC ID check for Xeon-based and other platforms that don't use serial APIC bus for interrupt delivery. Andi stated that AMD systems don't need unique IO_APIC_IDs either. Signed-off-by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
31 lines
1.4 KiB
C
31 lines
1.4 KiB
C
#ifndef __ASM_MACH_APIC_H
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#define __ASM_MACH_APIC_H
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#include <asm/genapic.h>
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#define esr_disable (genapic->ESR_DISABLE)
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#define NO_BALANCE_IRQ (genapic->no_balance_irq)
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#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
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#define INT_DEST_MODE (genapic->int_dest_mode)
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#undef APIC_DEST_LOGICAL
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#define APIC_DEST_LOGICAL (genapic->apic_destination_logical)
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#define TARGET_CPUS (genapic->target_cpus())
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#define apic_id_registered (genapic->apic_id_registered)
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#define init_apic_ldr (genapic->init_apic_ldr)
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#define ioapic_phys_id_map (genapic->ioapic_phys_id_map)
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#define clustered_apic_check (genapic->clustered_apic_check)
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#define multi_timer_check (genapic->multi_timer_check)
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#define apicid_to_node (genapic->apicid_to_node)
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#define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid)
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#define cpu_present_to_apicid (genapic->cpu_present_to_apicid)
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#define apicid_to_cpu_present (genapic->apicid_to_cpu_present)
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#define mpc_apic_id (genapic->mpc_apic_id)
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#define setup_portio_remap (genapic->setup_portio_remap)
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#define check_apicid_present (genapic->check_apicid_present)
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#define check_phys_apicid_present (genapic->check_phys_apicid_present)
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#define check_apicid_used (genapic->check_apicid_used)
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#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
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#define enable_apic_mode (genapic->enable_apic_mode)
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#define phys_pkg_id (genapic->phys_pkg_id)
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#endif /* __ASM_MACH_APIC_H */
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