959f85f8a3
This cleans up quite a lot of the PCI mess that we currently have, and attempts to consolidate the duplication in the SH7780 and SH7751 PCI controllers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
150 lines
3.8 KiB
C
150 lines
3.8 KiB
C
#ifndef __ASM_SH_PCI_H
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#define __ASM_SH_PCI_H
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#ifdef __KERNEL__
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#include <linux/dma-mapping.h>
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/* Can be used to override the logic in pci_scan_bus for skipping
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already-configured bus numbers - to be used for buggy BIOSes
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or architectures with incomplete PCI setup by the loader */
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#define pcibios_assign_all_busses() 1
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#define pcibios_scan_all_fns(a, b) 0
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/*
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* A board can define one or more PCI channels that represent built-in (or
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* external) PCI controllers.
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*/
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struct pci_channel {
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struct pci_ops *pci_ops;
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struct resource *io_resource;
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struct resource *mem_resource;
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int first_devfn;
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int last_devfn;
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};
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/*
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* Each board initializes this array and terminates it with a NULL entry.
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*/
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extern struct pci_channel board_pci_channels[];
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#define PCIBIOS_MIN_IO board_pci_channels->io_resource->start
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#define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start
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/*
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* I/O routine helpers
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*/
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#ifdef CONFIG_CPU_SUBTYPE_SH7780
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#define PCI_IO_AREA 0xFE400000
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#define PCI_IO_SIZE 0x00400000
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#else
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#define PCI_IO_AREA 0xFE240000
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#define PCI_IO_SIZE 0X00040000
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#endif
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#define PCI_MEM_SIZE 0x01000000
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#define SH4_PCIIOBR_MASK 0xFFFC0000
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#define pci_ioaddr(addr) (PCI_IO_AREA + (addr & ~SH4_PCIIOBR_MASK))
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#if defined(CONFIG_PCI)
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#define is_pci_ioaddr(port) \
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(((port) >= PCIBIOS_MIN_IO) && \
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((port) < (PCIBIOS_MIN_IO + PCI_IO_SIZE)))
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#define is_pci_memaddr(port) \
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(((port) >= PCIBIOS_MIN_MEM) && \
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((port) < (PCIBIOS_MIN_MEM + PCI_MEM_SIZE)))
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#else
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#define is_pci_ioaddr(port) (0)
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#define is_pci_memaddr(port) (0)
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#endif
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struct pci_dev;
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extern void pcibios_set_master(struct pci_dev *dev);
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static inline void pcibios_penalize_isa_irq(int irq, int active)
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{
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/* We don't do dynamic PCI IRQ allocation */
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}
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/* Dynamic DMA mapping stuff.
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* SuperH has everything mapped statically like x86.
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*/
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/* The PCI address space does equal the physical memory
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* address space. The networking and block device layers use
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* this boolean for bounce buffer decisions.
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*/
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#define PCI_DMA_BUS_IS_PHYS (1)
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <asm/scatterlist.h>
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#include <linux/string.h>
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#include <asm/io.h>
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/* pci_unmap_{single,page} being a nop depends upon the
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* configuration.
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*/
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#ifdef CONFIG_SH_PCIDMA_NONCOHERENT
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
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dma_addr_t ADDR_NAME;
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
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__u32 LEN_NAME;
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#define pci_unmap_addr(PTR, ADDR_NAME) \
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((PTR)->ADDR_NAME)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
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(((PTR)->ADDR_NAME) = (VAL))
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#define pci_unmap_len(PTR, LEN_NAME) \
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((PTR)->LEN_NAME)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
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(((PTR)->LEN_NAME) = (VAL))
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#else
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
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#define pci_unmap_addr(PTR, ADDR_NAME) (0)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
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#define pci_unmap_len(PTR, LEN_NAME) (0)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
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#endif
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/* Not supporting more than 32-bit PCI bus addresses now, but
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* must satisfy references to this function. Change if needed.
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*/
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#define pci_dac_dma_supported(pci_dev, mask) (0)
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#ifdef CONFIG_PCI
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static inline void pci_dma_burst_advice(struct pci_dev *pdev,
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enum pci_dma_burst_strategy *strat,
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unsigned long *strategy_parameter)
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{
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*strat = PCI_DMA_BURST_INFINITY;
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*strategy_parameter = ~0UL;
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}
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#endif
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/* Board-specific fixup routines. */
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void pcibios_fixup(void);
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int pcibios_init_platform(void);
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int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
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#ifdef CONFIG_PCI_AUTO
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int pciauto_assign_resources(int busno, struct pci_channel *hose);
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#endif
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static inline void pcibios_add_platform_entries(struct pci_dev *dev)
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{
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}
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#endif /* __KERNEL__ */
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/* generic pci stuff */
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#include <asm-generic/pci.h>
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/* generic DMA-mapping stuff */
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#include <asm-generic/pci-dma-compat.h>
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#endif /* __ASM_SH_PCI_H */
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