ab13446616
This patch fixes various issues with offb (the default fbdev used on powerpc when no proper fbdev is supported). It was broken when using BootX under some circumstances and would fail to properly get the framebuffer base address in others. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
525 lines
13 KiB
C
525 lines
13 KiB
C
/*
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* linux/drivers/video/offb.c -- Open Firmware based frame buffer device
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*
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* Copyright (C) 1997 Geert Uytterhoeven
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*
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* This driver is partly based on the PowerMac console driver:
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*
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* Copyright (C) 1996 Paul Mackerras
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/tty.h>
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#include <linux/slab.h>
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#include <linux/vmalloc.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/fb.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <asm/io.h>
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#include <asm/prom.h>
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#ifdef CONFIG_PPC64
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#include <asm/pci-bridge.h>
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#endif
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#ifdef CONFIG_PPC32
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#include <asm/bootx.h>
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#endif
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#include "macmodes.h"
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/* Supported palette hacks */
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enum {
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cmap_unknown,
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cmap_m64, /* ATI Mach64 */
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cmap_r128, /* ATI Rage128 */
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cmap_M3A, /* ATI Rage Mobility M3 Head A */
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cmap_M3B, /* ATI Rage Mobility M3 Head B */
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cmap_radeon, /* ATI Radeon */
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cmap_gxt2000, /* IBM GXT2000 */
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};
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struct offb_par {
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volatile void __iomem *cmap_adr;
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volatile void __iomem *cmap_data;
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int cmap_type;
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int blanked;
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};
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struct offb_par default_par;
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/*
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* Interface used by the world
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*/
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int offb_init(void);
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static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int transp, struct fb_info *info);
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static int offb_blank(int blank, struct fb_info *info);
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#ifdef CONFIG_PPC32
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extern boot_infos_t *boot_infos;
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#endif
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static void offb_init_nodriver(struct device_node *);
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static void offb_init_fb(const char *name, const char *full_name,
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int width, int height, int depth, int pitch,
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unsigned long address, struct device_node *dp);
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static struct fb_ops offb_ops = {
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.owner = THIS_MODULE,
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.fb_setcolreg = offb_setcolreg,
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.fb_blank = offb_blank,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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};
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/*
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* Set a single color register. The values supplied are already
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* rounded down to the hardware's capabilities (according to the
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* entries in the var structure). Return != 0 for invalid regno.
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*/
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static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int transp, struct fb_info *info)
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{
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struct offb_par *par = (struct offb_par *) info->par;
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int i, depth;
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u32 *pal = info->pseudo_palette;
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depth = info->var.bits_per_pixel;
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if (depth == 16)
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depth = (info->var.green.length == 5) ? 15 : 16;
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if (regno > 255 ||
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(depth == 16 && regno > 63) ||
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(depth == 15 && regno > 31))
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return 1;
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if (regno < 16) {
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switch (depth) {
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case 15:
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pal[regno] = (regno << 10) | (regno << 5) | regno;
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break;
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case 16:
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pal[regno] = (regno << 11) | (regno << 5) | regno;
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break;
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case 24:
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pal[regno] = (regno << 16) | (regno << 8) | regno;
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break;
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case 32:
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i = (regno << 8) | regno;
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pal[regno] = (i << 16) | i;
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break;
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}
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}
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red >>= 8;
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green >>= 8;
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blue >>= 8;
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if (!par->cmap_adr)
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return 0;
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switch (par->cmap_type) {
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case cmap_m64:
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writeb(regno, par->cmap_adr);
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writeb(red, par->cmap_data);
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writeb(green, par->cmap_data);
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writeb(blue, par->cmap_data);
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break;
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case cmap_M3A:
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/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
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out_le32(par->cmap_adr + 0x58,
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in_le32(par->cmap_adr + 0x58) & ~0x20);
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case cmap_r128:
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/* Set palette index & data */
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out_8(par->cmap_adr + 0xb0, regno);
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out_le32(par->cmap_adr + 0xb4,
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(red << 16 | green << 8 | blue));
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break;
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case cmap_M3B:
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/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
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out_le32(par->cmap_adr + 0x58,
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in_le32(par->cmap_adr + 0x58) | 0x20);
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/* Set palette index & data */
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out_8(par->cmap_adr + 0xb0, regno);
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out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
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break;
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case cmap_radeon:
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/* Set palette index & data (could be smarter) */
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out_8(par->cmap_adr + 0xb0, regno);
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out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue));
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break;
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case cmap_gxt2000:
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out_le32((unsigned __iomem *) par->cmap_adr + regno,
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(red << 16 | green << 8 | blue));
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break;
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}
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return 0;
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}
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/*
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* Blank the display.
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*/
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static int offb_blank(int blank, struct fb_info *info)
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{
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struct offb_par *par = (struct offb_par *) info->par;
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int i, j;
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if (!par->cmap_adr)
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return 0;
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if (!par->blanked)
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if (!blank)
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return 0;
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par->blanked = blank;
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if (blank)
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for (i = 0; i < 256; i++) {
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switch (par->cmap_type) {
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case cmap_m64:
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writeb(i, par->cmap_adr);
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for (j = 0; j < 3; j++)
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writeb(0, par->cmap_data);
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break;
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case cmap_M3A:
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/* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */
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out_le32(par->cmap_adr + 0x58,
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in_le32(par->cmap_adr + 0x58) & ~0x20);
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case cmap_r128:
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/* Set palette index & data */
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out_8(par->cmap_adr + 0xb0, i);
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out_le32(par->cmap_adr + 0xb4, 0);
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break;
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case cmap_M3B:
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/* Set PALETTE_ACCESS_CNTL in DAC_CNTL */
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out_le32(par->cmap_adr + 0x58,
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in_le32(par->cmap_adr + 0x58) | 0x20);
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/* Set palette index & data */
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out_8(par->cmap_adr + 0xb0, i);
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out_le32(par->cmap_adr + 0xb4, 0);
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break;
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case cmap_radeon:
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out_8(par->cmap_adr + 0xb0, i);
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out_le32(par->cmap_adr + 0xb4, 0);
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break;
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case cmap_gxt2000:
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out_le32((unsigned __iomem *) par->cmap_adr + i,
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0);
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break;
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}
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} else
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fb_set_cmap(&info->cmap, info);
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return 0;
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}
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/*
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* Initialisation
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*/
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int __init offb_init(void)
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{
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struct device_node *dp = NULL, *boot_disp = NULL;
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if (fb_get_options("offb", NULL))
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return -ENODEV;
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for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
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if (get_property(dp, "linux,opened", NULL) &&
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get_property(dp, "linux,boot-display", NULL)) {
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boot_disp = dp;
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offb_init_nodriver(dp);
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}
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}
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for (dp = NULL; (dp = of_find_node_by_type(dp, "display"));) {
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if (get_property(dp, "linux,opened", NULL) &&
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dp != boot_disp)
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offb_init_nodriver(dp);
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}
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return 0;
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}
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static void __init offb_init_nodriver(struct device_node *dp)
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{
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unsigned int len;
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int i, width = 640, height = 480, depth = 8, pitch = 640;
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unsigned int flags, rsize, addr_prop = 0;
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unsigned long max_size = 0;
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u64 rstart, address = OF_BAD_ADDR;
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u32 *pp, *addrp, *up;
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u64 asize;
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pp = (u32 *)get_property(dp, "linux,bootx-depth", &len);
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if (pp == NULL)
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pp = (u32 *)get_property(dp, "depth", &len);
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if (pp && len == sizeof(u32))
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depth = *pp;
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pp = (u32 *)get_property(dp, "linux,bootx-width", &len);
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if (pp == NULL)
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pp = (u32 *)get_property(dp, "width", &len);
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if (pp && len == sizeof(u32))
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width = *pp;
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pp = (u32 *)get_property(dp, "linux,bootx-height", &len);
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if (pp == NULL)
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pp = (u32 *)get_property(dp, "height", &len);
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if (pp && len == sizeof(u32))
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height = *pp;
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pp = (u32 *)get_property(dp, "linux,bootx-linebytes", &len);
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if (pp == NULL)
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pp = (u32 *)get_property(dp, "linebytes", &len);
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if (pp && len == sizeof(u32))
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pitch = *pp;
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else
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pitch = width * ((depth + 7) / 8);
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rsize = (unsigned long)pitch * (unsigned long)height;
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/* Ok, now we try to figure out the address of the framebuffer.
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*
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* Unfortunately, Open Firmware doesn't provide a standard way to do
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* so. All we can do is a dodgy heuristic that happens to work in
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* practice. On most machines, the "address" property contains what
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* we need, though not on Matrox cards found in IBM machines. What I've
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* found that appears to give good results is to go through the PCI
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* ranges and pick one that is both big enough and if possible encloses
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* the "address" property. If none match, we pick the biggest
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*/
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up = (u32 *)get_property(dp, "linux,bootx-addr", &len);
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if (up == NULL)
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up = (u32 *)get_property(dp, "address", &len);
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if (up && len == sizeof(u32))
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addr_prop = *up;
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for (i = 0; (addrp = of_get_address(dp, i, &asize, &flags))
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!= NULL; i++) {
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int match_addrp = 0;
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if (!(flags & IORESOURCE_MEM))
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continue;
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if (asize < rsize)
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continue;
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rstart = of_translate_address(dp, addrp);
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if (rstart == OF_BAD_ADDR)
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continue;
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if (addr_prop && (rstart <= addr_prop) &&
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((rstart + asize) >= (addr_prop + rsize)))
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match_addrp = 1;
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if (match_addrp) {
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address = addr_prop;
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break;
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}
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if (rsize > max_size) {
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max_size = rsize;
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address = OF_BAD_ADDR;
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}
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if (address == OF_BAD_ADDR)
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address = rstart;
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}
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if (address == OF_BAD_ADDR && addr_prop)
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address = (u64)addr_prop;
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if (address != OF_BAD_ADDR) {
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/* kludge for valkyrie */
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if (strcmp(dp->name, "valkyrie") == 0)
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address += 0x1000;
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offb_init_fb(dp->name, dp->full_name, width, height, depth,
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pitch, address, dp);
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}
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}
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static void __init offb_init_fb(const char *name, const char *full_name,
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int width, int height, int depth,
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int pitch, unsigned long address,
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struct device_node *dp)
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{
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unsigned long res_size = pitch * height * (depth + 7) / 8;
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struct offb_par *par = &default_par;
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unsigned long res_start = address;
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struct fb_fix_screeninfo *fix;
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struct fb_var_screeninfo *var;
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struct fb_info *info;
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int size;
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if (!request_mem_region(res_start, res_size, "offb"))
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return;
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printk(KERN_INFO
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"Using unsupported %dx%d %s at %lx, depth=%d, pitch=%d\n",
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width, height, name, address, depth, pitch);
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if (depth != 8 && depth != 15 && depth != 16 && depth != 32) {
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printk(KERN_ERR "%s: can't use depth = %d\n", full_name,
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depth);
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release_mem_region(res_start, res_size);
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return;
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}
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size = sizeof(struct fb_info) + sizeof(u32) * 17;
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info = kmalloc(size, GFP_ATOMIC);
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if (info == 0) {
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release_mem_region(res_start, res_size);
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return;
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}
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memset(info, 0, size);
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fix = &info->fix;
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var = &info->var;
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strcpy(fix->id, "OFfb ");
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strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb "));
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fix->id[sizeof(fix->id) - 1] = '\0';
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var->xres = var->xres_virtual = width;
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var->yres = var->yres_virtual = height;
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fix->line_length = pitch;
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fix->smem_start = address;
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fix->smem_len = pitch * height;
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fix->type = FB_TYPE_PACKED_PIXELS;
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fix->type_aux = 0;
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par->cmap_type = cmap_unknown;
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if (depth == 8) {
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/* Palette hacks disabled for now */
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#if 0
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if (dp && !strncmp(name, "ATY,Rage128", 11)) {
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unsigned long regbase = dp->addrs[2].address;
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par->cmap_adr = ioremap(regbase, 0x1FFF);
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par->cmap_type = cmap_r128;
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} else if (dp && (!strncmp(name, "ATY,RageM3pA", 12)
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|| !strncmp(name, "ATY,RageM3p12A", 14))) {
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unsigned long regbase =
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dp->parent->addrs[2].address;
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par->cmap_adr = ioremap(regbase, 0x1FFF);
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par->cmap_type = cmap_M3A;
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} else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) {
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unsigned long regbase =
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dp->parent->addrs[2].address;
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par->cmap_adr = ioremap(regbase, 0x1FFF);
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par->cmap_type = cmap_M3B;
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} else if (dp && !strncmp(name, "ATY,Rage6", 9)) {
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unsigned long regbase = dp->addrs[1].address;
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par->cmap_adr = ioremap(regbase, 0x1FFF);
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par->cmap_type = cmap_radeon;
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} else if (!strncmp(name, "ATY,", 4)) {
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unsigned long base = address & 0xff000000UL;
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par->cmap_adr =
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ioremap(base + 0x7ff000, 0x1000) + 0xcc0;
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par->cmap_data = par->cmap_adr + 1;
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par->cmap_type = cmap_m64;
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} else if (device_is_compatible(dp, "pci1014,b7")) {
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unsigned long regbase = dp->addrs[0].address;
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par->cmap_adr = ioremap(regbase + 0x6000, 0x1000);
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par->cmap_type = cmap_gxt2000;
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}
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#endif
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fix->visual = par->cmap_adr ? FB_VISUAL_PSEUDOCOLOR
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: FB_VISUAL_STATIC_PSEUDOCOLOR;
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} else
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fix->visual = /* par->cmap_adr ? FB_VISUAL_DIRECTCOLOR
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: */ FB_VISUAL_TRUECOLOR;
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var->xoffset = var->yoffset = 0;
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switch (depth) {
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case 8:
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var->bits_per_pixel = 8;
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var->red.offset = 0;
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var->red.length = 8;
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var->green.offset = 0;
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var->green.length = 8;
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var->blue.offset = 0;
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var->blue.length = 8;
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var->transp.offset = 0;
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var->transp.length = 0;
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break;
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case 15: /* RGB 555 */
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var->bits_per_pixel = 16;
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var->red.offset = 10;
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var->red.length = 5;
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var->green.offset = 5;
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var->green.length = 5;
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var->blue.offset = 0;
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var->blue.length = 5;
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var->transp.offset = 0;
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var->transp.length = 0;
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break;
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case 16: /* RGB 565 */
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var->bits_per_pixel = 16;
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var->red.offset = 11;
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var->red.length = 5;
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var->green.offset = 5;
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var->green.length = 6;
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var->blue.offset = 0;
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var->blue.length = 5;
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var->transp.offset = 0;
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var->transp.length = 0;
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break;
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case 32: /* RGB 888 */
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var->bits_per_pixel = 32;
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var->red.offset = 16;
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var->red.length = 8;
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var->green.offset = 8;
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var->green.length = 8;
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var->blue.offset = 0;
|
|
var->blue.length = 8;
|
|
var->transp.offset = 24;
|
|
var->transp.length = 8;
|
|
break;
|
|
}
|
|
var->red.msb_right = var->green.msb_right = var->blue.msb_right =
|
|
var->transp.msb_right = 0;
|
|
var->grayscale = 0;
|
|
var->nonstd = 0;
|
|
var->activate = 0;
|
|
var->height = var->width = -1;
|
|
var->pixclock = 10000;
|
|
var->left_margin = var->right_margin = 16;
|
|
var->upper_margin = var->lower_margin = 16;
|
|
var->hsync_len = var->vsync_len = 8;
|
|
var->sync = 0;
|
|
var->vmode = FB_VMODE_NONINTERLACED;
|
|
|
|
info->fbops = &offb_ops;
|
|
info->screen_base = ioremap(address, fix->smem_len);
|
|
info->par = par;
|
|
info->pseudo_palette = (void *) (info + 1);
|
|
info->flags = FBINFO_DEFAULT;
|
|
|
|
fb_alloc_cmap(&info->cmap, 256, 0);
|
|
|
|
if (register_framebuffer(info) < 0) {
|
|
kfree(info);
|
|
release_mem_region(res_start, res_size);
|
|
return;
|
|
}
|
|
|
|
printk(KERN_INFO "fb%d: Open Firmware frame buffer device on %s\n",
|
|
info->node, full_name);
|
|
}
|
|
|
|
module_init(offb_init);
|
|
MODULE_LICENSE("GPL");
|