android_kernel_motorola_sm6225/include/asm-sh/dreamcast/sysasic.h
Paul Mundt 31d106c68b sh: Fix dreamcast build for IRQ changes.
When the irq.h changes went in, the dreamcast code was still
referencing an old value. Switch it back to the IRQ number,
which fixes this:

arch/sh/boards/dreamcast/irq.c: In function `disable_systemasic_irq':
arch/sh/boards/dreamcast/irq.c:59: error: `OFFCHIP_IRQ_BASE' undeclared (first
use in this function)
arch/sh/boards/dreamcast/irq.c:59: error: (Each undeclared identifier is reported only once
arch/sh/boards/dreamcast/irq.c:59: error: for each function it appears in.)

Reported-by: Adrian McMenamin <adrian@newgolddream.dyndns.info>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-05-21 15:10:04 +09:00

43 lines
1.4 KiB
C

/* include/asm-sh/dreamcast/sysasic.h
*
* Definitions for the Dreamcast System ASIC and related peripherals.
*
* Copyright (c) 2001 M. R. Brown <mrbrown@linuxdc.org>
* Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
*
* This file is part of the LinuxDC project (www.linuxdc.org)
*
* Released under the terms of the GNU GPL v2.0.
*
*/
#ifndef __ASM_SH_DREAMCAST_SYSASIC_H
#define __ASM_SH_DREAMCAST_SYSASIC_H
#include <asm/irq.h>
/* Hardware events -
Each of these events correspond to a bit within the Event Mask Registers/
Event Status Registers. Because of the virtual IRQ numbering scheme, a
base offset must be used when calculating the virtual IRQ that each event
takes.
*/
#define HW_EVENT_IRQ_BASE 48
/* IRQ 13 */
#define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */
#define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */
#define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */
#define HW_EVENT_G2_DMA (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */
#define HW_EVENT_PVR2_DMA (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */
/* IRQ 11 */
#define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */
#define HW_EVENT_AICA_SYS (HW_EVENT_IRQ_BASE + 33) /* AICA-related */
#define HW_EVENT_EXTERNAL (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */
#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95)
#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */