fac28e6df9
8e19608 missed updating SA11x0, and thus:
arch/arm/mach-sa1100/time.c:88: warning: initialization from incompatible pointer type
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
158 lines
3.4 KiB
C
158 lines
3.4 KiB
C
/*
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* linux/arch/arm/mach-sa1100/time.c
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*
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* Copyright (C) 1998 Deborah Wallach.
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* Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
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*
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* 2000/03/29 (C) Nicolas Pitre <nico@fluxnic.net>
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* Rewritten: big cleanup, much simpler, better HZ accuracy.
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*
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*/
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/timex.h>
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#include <linux/clockchips.h>
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#include <asm/mach/time.h>
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#include <mach/hardware.h>
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#define MIN_OSCR_DELTA 2
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static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *c = dev_id;
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/* Disarm the compare/match, signal the event. */
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OIER &= ~OIER_E0;
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OSSR = OSSR_M0;
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c->event_handler(c);
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return IRQ_HANDLED;
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}
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static int
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sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
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{
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unsigned long flags, next, oscr;
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raw_local_irq_save(flags);
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OIER |= OIER_E0;
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next = OSCR + delta;
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OSMR0 = next;
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oscr = OSCR;
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raw_local_irq_restore(flags);
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return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
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}
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static void
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sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
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{
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unsigned long flags;
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switch (mode) {
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case CLOCK_EVT_MODE_ONESHOT:
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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raw_local_irq_save(flags);
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OIER &= ~OIER_E0;
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OSSR = OSSR_M0;
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raw_local_irq_restore(flags);
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break;
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case CLOCK_EVT_MODE_RESUME:
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case CLOCK_EVT_MODE_PERIODIC:
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break;
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}
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}
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static struct clock_event_device ckevt_sa1100_osmr0 = {
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.name = "osmr0",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.rating = 200,
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.set_next_event = sa1100_osmr0_set_next_event,
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.set_mode = sa1100_osmr0_set_mode,
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};
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static cycle_t sa1100_read_oscr(struct clocksource *s)
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{
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return OSCR;
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}
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static struct clocksource cksrc_sa1100_oscr = {
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.name = "oscr",
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.rating = 200,
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.read = sa1100_read_oscr,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 20,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static struct irqaction sa1100_timer_irq = {
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.name = "ost0",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = sa1100_ost0_interrupt,
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.dev_id = &ckevt_sa1100_osmr0,
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};
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static void __init sa1100_timer_init(void)
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{
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OIER = 0; /* disable any timer interrupts */
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OSSR = 0xf; /* clear status on all timers */
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ckevt_sa1100_osmr0.mult =
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div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift);
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ckevt_sa1100_osmr0.max_delta_ns =
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clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
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ckevt_sa1100_osmr0.min_delta_ns =
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clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
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ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
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cksrc_sa1100_oscr.mult =
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clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift);
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setup_irq(IRQ_OST0, &sa1100_timer_irq);
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clocksource_register(&cksrc_sa1100_oscr);
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clockevents_register_device(&ckevt_sa1100_osmr0);
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}
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#ifdef CONFIG_PM
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unsigned long osmr[4], oier;
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static void sa1100_timer_suspend(void)
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{
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osmr[0] = OSMR0;
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osmr[1] = OSMR1;
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osmr[2] = OSMR2;
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osmr[3] = OSMR3;
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oier = OIER;
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}
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static void sa1100_timer_resume(void)
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{
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OSSR = 0x0f;
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OSMR0 = osmr[0];
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OSMR1 = osmr[1];
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OSMR2 = osmr[2];
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OSMR3 = osmr[3];
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OIER = oier;
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/*
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* OSMR0 is the system timer: make sure OSCR is sufficiently behind
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*/
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OSCR = OSMR0 - LATCH;
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}
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#else
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#define sa1100_timer_suspend NULL
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#define sa1100_timer_resume NULL
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#endif
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struct sys_timer sa1100_timer = {
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.init = sa1100_timer_init,
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.suspend = sa1100_timer_suspend,
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.resume = sa1100_timer_resume,
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};
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