73a59c1c4a
Patch from SAN People Following changes were made to clock.c: 1) Replaced <asm/hardware/clock.h> with <linux/clk.h> 2) Removed old unused clk_enable & clk_disable. 3) Replaced clk_use/clk_unuse with clk_enable/clk_disable. Otherwise it's the same as the previous patch. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
55 lines
1.8 KiB
C
55 lines
1.8 KiB
C
/*
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* include/asm-arm/arch-at91rm9200/uncompress.h
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*
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* Copyright (C) 2003 SAN People
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __ASM_ARCH_UNCOMPRESS_H
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#define __ASM_ARCH_UNCOMPRESS_H
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#include <asm/arch/hardware.h>
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/*
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* The following code assumes the serial port has already been
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* initialized by the bootloader. We search for the first enabled
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* port in the most probable order. If you didn't setup a port in
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* your bootloader then nothing will appear (which might be desired).
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*
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* This does not append a newline
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*/
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static void putstr(const char *s)
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{
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void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
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while (*s) {
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while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
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__raw_writel(*s, sys + AT91_DBGU_THR);
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if (*s == '\n') {
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while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
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__raw_writel('\r', sys + AT91_DBGU_THR);
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}
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s++;
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}
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/* wait for transmission to complete */
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while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) { barrier(); }
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}
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#define arch_decomp_setup()
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#define arch_decomp_wdog()
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#endif
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