662146b155
There is no defconfig file for gemini, which has lead to a lot of bitrot. This makes the broken board files, the gpio implementation and the reset logic work again, and fixes the build warnings that got introduced with the changes to the readl/writel prototypes. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
103 lines
3 KiB
C
103 lines
3 KiB
C
/*
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* Interrupt routines for Gemini
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*
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* Copyright (C) 2001-2006 Storlink, Corp.
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* Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/stddef.h>
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#include <linux/list.h>
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#include <linux/sched.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/system_misc.h>
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#include <mach/hardware.h>
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#define IRQ_SOURCE(base_addr) (base_addr + 0x00)
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#define IRQ_MASK(base_addr) (base_addr + 0x04)
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#define IRQ_CLEAR(base_addr) (base_addr + 0x08)
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#define IRQ_TMODE(base_addr) (base_addr + 0x0C)
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#define IRQ_TLEVEL(base_addr) (base_addr + 0x10)
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#define IRQ_STATUS(base_addr) (base_addr + 0x14)
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#define FIQ_SOURCE(base_addr) (base_addr + 0x20)
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#define FIQ_MASK(base_addr) (base_addr + 0x24)
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#define FIQ_CLEAR(base_addr) (base_addr + 0x28)
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#define FIQ_TMODE(base_addr) (base_addr + 0x2C)
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#define FIQ_LEVEL(base_addr) (base_addr + 0x30)
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#define FIQ_STATUS(base_addr) (base_addr + 0x34)
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static void gemini_ack_irq(struct irq_data *d)
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{
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__raw_writel(1 << d->irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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}
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static void gemini_mask_irq(struct irq_data *d)
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{
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unsigned int mask;
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mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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mask &= ~(1 << d->irq);
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__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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}
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static void gemini_unmask_irq(struct irq_data *d)
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{
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unsigned int mask;
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mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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mask |= (1 << d->irq);
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__raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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}
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static struct irq_chip gemini_irq_chip = {
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.name = "INTC",
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.irq_ack = gemini_ack_irq,
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.irq_mask = gemini_mask_irq,
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.irq_unmask = gemini_unmask_irq,
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};
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static struct resource irq_resource = {
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.name = "irq_handler",
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.start = GEMINI_INTERRUPT_BASE,
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.end = FIQ_STATUS(GEMINI_INTERRUPT_BASE) + 4,
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};
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void __init gemini_init_irq(void)
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{
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unsigned int i, mode = 0, level = 0;
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/*
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* Disable the idle handler by default since it is buggy
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* For more info see arch/arm/mach-gemini/idle.c
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*/
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disable_hlt();
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request_resource(&iomem_resource, &irq_resource);
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for (i = 0; i < NR_IRQS; i++) {
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irq_set_chip(i, &gemini_irq_chip);
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if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) {
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irq_set_handler(i, handle_edge_irq);
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mode |= 1 << i;
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level |= 1 << i;
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} else {
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irq_set_handler(i, handle_level_irq);
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}
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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}
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/* Disable all interrupts */
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__raw_writel(0, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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__raw_writel(0, FIQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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/* Set interrupt mode */
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__raw_writel(mode, IRQ_TMODE(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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__raw_writel(level, IRQ_TLEVEL(IO_ADDRESS(GEMINI_INTERRUPT_BASE)));
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}
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