68abdbbb03
This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
66 lines
1.3 KiB
C
66 lines
1.3 KiB
C
/*
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* arch/sh/boards/shmin/setup.c
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*
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* Copyright (C) 2006 Takashi YOSHII
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*
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* SHMIN Support.
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*/
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/machvec.h>
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#include <asm/shmin.h>
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#include <asm/clock.h>
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#include <asm/io.h>
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#define PFC_PHCR 0xa400010eUL
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#define INTC_ICR1 0xa4000010UL
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#define INTC_IPRC 0xa4000016UL
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static struct ipr_data ipr_irq_table[] = {
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{ 32, 0, 0, 0 },
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{ 33, 0, 4, 0 },
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{ 34, 0, 8, 8 },
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{ 35, 0, 12, 0 },
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};
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static unsigned long ipr_offsets[] = {
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INTC_IPRC,
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};
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static struct ipr_desc ipr_irq_desc = {
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.ipr_offsets = ipr_offsets,
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.nr_offsets = ARRAY_SIZE(ipr_offsets),
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.ipr_data = ipr_irq_table,
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.nr_irqs = ARRAY_SIZE(ipr_irq_table),
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.chip = {
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.name = "IPR-shmin",
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},
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};
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static void __init init_shmin_irq(void)
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{
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ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
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ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
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register_ipr_controller(&ipr_irq_desc);
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}
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static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
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{
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static int dummy;
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if ((port & ~0x1f) == SHMIN_NE_BASE)
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return (void __iomem *)(SHMIN_IO_BASE + port);
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dummy = 0;
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return &dummy;
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}
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static struct sh_machine_vector mv_shmin __initmv = {
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.mv_name = "SHMIN",
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.mv_init_irq = init_shmin_irq,
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.mv_ioport_map = shmin_ioport_map,
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};
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