510c72ad2d
There were a number of places that made evil PAGE_SIZE == 4k assumptions that ended up breaking when trying to play with 8k and 64k page sizes, this fixes those up. The most significant change is the way we load THREAD_SIZE, previously this was done via: mov #(THREAD_SIZE >> 8), reg shll8 reg to avoid a memory access and allow the immediate load. With a 64k PAGE_SIZE, we're out of range for the immediate load size without resorting to special instructions available in later ISAs (movi20s and so on). The "workaround" for this is to bump up the shift to 10 and insert a shll2, which gives a bit more flexibility while still being much cheaper than a memory access. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
197 lines
2.9 KiB
ArmAsm
197 lines
2.9 KiB
ArmAsm
/*
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* __clear_user_page, __clear_user, clear_page implementation of SuperH
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*
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* Copyright (C) 2001 Kaz Kojima
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* Copyright (C) 2001, 2002 Niibe Yutaka
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* Copyright (C) 2006 Paul Mundt
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*/
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#include <linux/linkage.h>
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#include <asm/page.h>
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/*
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* clear_page_slow
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* @to: P1 address
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*
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* void clear_page_slow(void *to)
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*/
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/*
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* r0 --- scratch
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* r4 --- to
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* r5 --- to + PAGE_SIZE
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*/
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ENTRY(clear_page_slow)
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mov r4,r5
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mov.l .Llimit,r0
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add r0,r5
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mov #0,r0
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!
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1:
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#if defined(CONFIG_CPU_SH3)
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mov.l r0,@r4
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#elif defined(CONFIG_CPU_SH4)
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movca.l r0,@r4
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mov r4,r1
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#endif
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add #32,r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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#if defined(CONFIG_CPU_SH4)
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ocbwb @r1
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#endif
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cmp/eq r5,r4
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bf/s 1b
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add #28,r4
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!
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rts
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nop
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.Llimit: .long (PAGE_SIZE-28)
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ENTRY(__clear_user)
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!
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mov #0, r0
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mov #0xe0, r1 ! 0xffffffe0
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!
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! r4..(r4+31)&~32 -------- not aligned [ Area 0 ]
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! (r4+31)&~32..(r4+r5)&~32 -------- aligned [ Area 1 ]
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! (r4+r5)&~32..r4+r5 -------- not aligned [ Area 2 ]
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!
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! Clear area 0
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mov r4, r2
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!
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tst r1, r5 ! length < 32
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bt .Larea2 ! skip to remainder
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!
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add #31, r2
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and r1, r2
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cmp/eq r4, r2
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bt .Larea1
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mov r2, r3
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sub r4, r3
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mov r3, r7
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mov r4, r2
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!
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.L0: dt r3
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0: mov.b r0, @r2
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bf/s .L0
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add #1, r2
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!
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sub r7, r5
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mov r2, r4
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.Larea1:
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mov r4, r3
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add r5, r3
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and r1, r3
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cmp/hi r2, r3
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bf .Larea2
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!
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! Clear area 1
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#if defined(CONFIG_CPU_SH4)
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1: movca.l r0, @r2
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#else
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1: mov.l r0, @r2
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#endif
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add #4, r2
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2: mov.l r0, @r2
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add #4, r2
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3: mov.l r0, @r2
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add #4, r2
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4: mov.l r0, @r2
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add #4, r2
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5: mov.l r0, @r2
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add #4, r2
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6: mov.l r0, @r2
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add #4, r2
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7: mov.l r0, @r2
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add #4, r2
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8: mov.l r0, @r2
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add #4, r2
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cmp/hi r2, r3
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bt/s 1b
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nop
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!
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! Clear area 2
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.Larea2:
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mov r4, r3
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add r5, r3
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cmp/hs r3, r2
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bt/s .Ldone
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sub r2, r3
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.L2: dt r3
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9: mov.b r0, @r2
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bf/s .L2
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add #1, r2
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!
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.Ldone: rts
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mov #0, r0 ! return 0 as normal return
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! return the number of bytes remained
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.Lbad_clear_user:
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mov r4, r0
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add r5, r0
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rts
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sub r2, r0
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.section __ex_table,"a"
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.align 2
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.long 0b, .Lbad_clear_user
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.long 1b, .Lbad_clear_user
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.long 2b, .Lbad_clear_user
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.long 3b, .Lbad_clear_user
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.long 4b, .Lbad_clear_user
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.long 5b, .Lbad_clear_user
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.long 6b, .Lbad_clear_user
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.long 7b, .Lbad_clear_user
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.long 8b, .Lbad_clear_user
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.long 9b, .Lbad_clear_user
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.previous
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#if defined(CONFIG_CPU_SH4)
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/*
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* __clear_user_page
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* @to: P3 address (with same color)
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* @orig_to: P1 address
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*
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* void __clear_user_page(void *to, void *orig_to)
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*/
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/*
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* r0 --- scratch
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* r4 --- to
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* r5 --- orig_to
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* r6 --- to + PAGE_SIZE
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*/
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ENTRY(__clear_user_page)
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mov.l .Lpsz,r0
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mov r4,r6
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add r0,r6
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mov #0,r0
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!
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1: ocbi @r5
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add #32,r5
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movca.l r0,@r4
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mov r4,r1
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add #32,r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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mov.l r0,@-r4
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add #28,r4
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cmp/eq r6,r4
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bf/s 1b
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ocbwb @r1
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!
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rts
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nop
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.Lpsz: .long PAGE_SIZE
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#endif
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