b786af117b
Previously, DCR support was configured at compile time to either use MMIO or native dcr instructions. Although this works for most platforms, it fails on FPGA platforms: 1) Systems may include more than one DCR bus. 2) Systems may be native DCR capable and still use memory mapped DCR interface. This patch provides runtime support based on the device trees for the case where CONFIG_PPC_DCR_MMIO and CONFIG_PPC_DCR_NATIVE are both selected. Previously, this was a poorly defined configuration, which happened to provide NATIVE support. The runtime selection is made based on the dcr-controller having a 'dcr-access-method' attribute in the device tree. If only one of the above options is selected, then the code uses #defines to select only the used code in order to avoid introducing overhead in existing usage. Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
116 lines
3.3 KiB
C
116 lines
3.3 KiB
C
/*
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* (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp.
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* <benh@kernel.crashing.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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* the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef _ASM_POWERPC_DCR_NATIVE_H
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#define _ASM_POWERPC_DCR_NATIVE_H
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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#include <linux/spinlock.h>
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typedef struct {
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unsigned int base;
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} dcr_host_native_t;
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static inline bool dcr_map_ok_native(dcr_host_native_t host)
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{
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return 1;
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}
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#define dcr_map_native(dev, dcr_n, dcr_c) \
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((dcr_host_native_t){ .base = (dcr_n) })
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#define dcr_unmap_native(host, dcr_c) do {} while (0)
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#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base)
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#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value)
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/* Device Control Registers */
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void __mtdcr(int reg, unsigned int val);
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unsigned int __mfdcr(int reg);
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#define mfdcr(rn) \
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({unsigned int rval; \
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if (__builtin_constant_p(rn)) \
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asm volatile("mfdcr %0," __stringify(rn) \
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: "=r" (rval)); \
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else \
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rval = __mfdcr(rn); \
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rval;})
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#define mtdcr(rn, v) \
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do { \
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if (__builtin_constant_p(rn)) \
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asm volatile("mtdcr " __stringify(rn) ",%0" \
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: : "r" (v)); \
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else \
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__mtdcr(rn, v); \
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} while (0)
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/* R/W of indirect DCRs make use of standard naming conventions for DCRs */
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extern spinlock_t dcr_ind_lock;
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static inline unsigned __mfdcri(int base_addr, int base_data, int reg)
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{
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unsigned long flags;
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unsigned int val;
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spin_lock_irqsave(&dcr_ind_lock, flags);
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__mtdcr(base_addr, reg);
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val = __mfdcr(base_data);
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spin_unlock_irqrestore(&dcr_ind_lock, flags);
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return val;
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}
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static inline void __mtdcri(int base_addr, int base_data, int reg,
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unsigned val)
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{
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unsigned long flags;
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spin_lock_irqsave(&dcr_ind_lock, flags);
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__mtdcr(base_addr, reg);
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__mtdcr(base_data, val);
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spin_unlock_irqrestore(&dcr_ind_lock, flags);
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}
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static inline void __dcri_clrset(int base_addr, int base_data, int reg,
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unsigned clr, unsigned set)
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{
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unsigned long flags;
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unsigned int val;
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spin_lock_irqsave(&dcr_ind_lock, flags);
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__mtdcr(base_addr, reg);
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val = (__mfdcr(base_data) & ~clr) | set;
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__mtdcr(base_data, val);
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spin_unlock_irqrestore(&dcr_ind_lock, flags);
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}
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#define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \
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DCRN_ ## base ## _CONFIG_DATA, \
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reg)
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#define mtdcri(base, reg, data) __mtdcri(DCRN_ ## base ## _CONFIG_ADDR, \
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DCRN_ ## base ## _CONFIG_DATA, \
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reg, data)
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#define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \
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DCRN_ ## base ## _CONFIG_DATA, \
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reg, clr, set)
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#endif /* __ASSEMBLY__ */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_DCR_NATIVE_H */
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