1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
177 lines
5 KiB
C
177 lines
5 KiB
C
/*
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* Authors: Frank Rowand <frank_rowand@mvista.com>,
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* Debbie Chu <debbie_chu@mvista.com>, or source@mvista.com
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* Further modifications by Armin Kuster <akuster@mvista.com>
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*
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* 2000 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* Based on arch/ppc/kernel/indirect.c, Copyright (C) 1998 Gabriel Paubert.
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*/
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#include <linux/pci.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/machdep.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <asm/ocp.h>
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#include <asm/ibm4xx.h>
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#include <asm/pci-bridge.h>
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#include <asm/ibm_ocp_pci.h>
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extern void bios_fixup(struct pci_controller *, struct pcil0_regs *);
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extern int ppc405_map_irq(struct pci_dev *dev, unsigned char idsel,
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unsigned char pin);
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void
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ppc405_pcibios_fixup_resources(struct pci_dev *dev)
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{
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int i;
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unsigned long max_host_addr;
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unsigned long min_host_addr;
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struct resource *res;
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/*
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* openbios puts some graphics cards in the same range as the host
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* controller uses to map to SDRAM. Fix it.
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*/
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min_host_addr = 0;
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max_host_addr = PPC405_PCI_MEM_BASE - 1;
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for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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res = dev->resource + i;
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if (!res->start)
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continue;
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if ((res->flags & IORESOURCE_MEM) &&
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(((res->start >= min_host_addr)
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&& (res->start <= max_host_addr))
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|| ((res->end >= min_host_addr)
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&& (res->end <= max_host_addr))
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|| ((res->start < min_host_addr)
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&& (res->end > max_host_addr))
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)
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) {
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/* force pcibios_assign_resources() to assign a new address */
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res->end -= res->start;
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res->start = 0;
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}
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}
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}
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static int
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ppc4xx_exclude_device(unsigned char bus, unsigned char devfn)
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{
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/* We prevent us from seeing ourselves to avoid having
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* the kernel try to remap our BAR #1 and fuck up bus
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* master from external PCI devices
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*/
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return (bus == 0 && devfn == 0);
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}
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void
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ppc4xx_find_bridges(void)
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{
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struct pci_controller *hose_a;
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struct pcil0_regs *pcip;
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unsigned int tmp_addr;
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unsigned int tmp_size;
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unsigned int reg_index;
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unsigned int new_pmm_max = 0;
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unsigned int new_pmm_min = 0;
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isa_io_base = 0;
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isa_mem_base = 0;
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pci_dram_offset = 0;
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#if (PSR_PCI_ARBIT_EN > 1)
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/* Check if running in slave mode */
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if ((mfdcr(DCRN_CHPSR) & PSR_PCI_ARBIT_EN) == 0) {
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printk("Running as PCI slave, kernel PCI disabled !\n");
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return;
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}
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#endif
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/* Setup PCI32 hose */
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hose_a = pcibios_alloc_controller();
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if (!hose_a)
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return;
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setup_indirect_pci(hose_a, PPC405_PCI_CONFIG_ADDR,
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PPC405_PCI_CONFIG_DATA);
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pcip = ioremap(PPC4xx_PCI_LCFG_PADDR, PAGE_SIZE);
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if (pcip != NULL) {
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#if defined(CONFIG_BIOS_FIXUP)
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bios_fixup(hose_a, pcip);
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#endif
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new_pmm_min = 0xffffffff;
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for (reg_index = 0; reg_index < 3; reg_index++) {
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tmp_size = in_le32(&pcip->pmm[reg_index].ma); // mask & attrs
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/* test the enable bit */
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if ((tmp_size & 0x1) == 0)
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continue;
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tmp_addr = in_le32(&pcip->pmm[reg_index].pcila); // PCI addr
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if (tmp_addr < PPC405_PCI_PHY_MEM_BASE) {
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printk(KERN_DEBUG
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"Disabling mapping to PCI mem addr 0x%8.8x\n",
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tmp_addr);
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out_le32(&pcip->pmm[reg_index].ma, tmp_size & ~1); // *_PMMOMA
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continue;
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}
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tmp_addr = in_le32(&pcip->pmm[reg_index].la); // *_PMMOLA
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if (tmp_addr < new_pmm_min)
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new_pmm_min = tmp_addr;
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tmp_addr = tmp_addr +
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(0xffffffff - (tmp_size & 0xffffc000));
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if (tmp_addr > PPC405_PCI_UPPER_MEM) {
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new_pmm_max = tmp_addr; // PPC405_PCI_UPPER_MEM
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} else {
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new_pmm_max = PPC405_PCI_UPPER_MEM;
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}
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} // for
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iounmap(pcip);
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}
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hose_a->first_busno = 0;
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hose_a->last_busno = 0xff;
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hose_a->pci_mem_offset = 0;
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/* Setup bridge memory/IO ranges & resources
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* TODO: Handle firmwares setting up a legacy ISA mem base
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*/
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hose_a->io_space.start = PPC405_PCI_LOWER_IO;
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hose_a->io_space.end = PPC405_PCI_UPPER_IO;
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hose_a->mem_space.start = new_pmm_min;
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hose_a->mem_space.end = new_pmm_max;
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hose_a->io_base_phys = PPC405_PCI_PHY_IO_BASE;
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hose_a->io_base_virt = ioremap(hose_a->io_base_phys, 0x10000);
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hose_a->io_resource.start = 0;
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hose_a->io_resource.end = PPC405_PCI_UPPER_IO - PPC405_PCI_LOWER_IO;
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hose_a->io_resource.flags = IORESOURCE_IO;
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hose_a->io_resource.name = "PCI I/O";
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hose_a->mem_resources[0].start = new_pmm_min;
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hose_a->mem_resources[0].end = new_pmm_max;
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hose_a->mem_resources[0].flags = IORESOURCE_MEM;
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hose_a->mem_resources[0].name = "PCI Memory";
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isa_io_base = (int) hose_a->io_base_virt;
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isa_mem_base = 0; /* ISA not implemented */
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ISA_DMA_THRESHOLD = 0x00ffffff; /* ??? ISA not implemented */
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/* Scan busses & initial setup by pci_auto */
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hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
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hose_a->last_busno = 0;
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/* Setup ppc_md */
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ppc_md.pcibios_fixup = NULL;
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ppc_md.pci_exclude_device = ppc4xx_exclude_device;
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ppc_md.pcibios_fixup_resources = ppc405_pcibios_fixup_resources;
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ppc_md.pci_swizzle = common_swizzle;
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ppc_md.pci_map_irq = ppc405_map_irq;
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}
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