1efc80b53e
Enable: PM_SUSPEND_MEM -> Blackfin Hibernate to SDRAM This feature requires a special bootloader (u-boot) supporting return from hibernate. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
58 lines
1.3 KiB
C
58 lines
1.3 KiB
C
/*
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* include/asm-blackfin/dpmc.h - Miscellaneous IOCTL commands for Dynamic Power
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* Management Controller Driver.
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* Copyright (C) 2004-2008 Analog Device Inc.
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*
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*/
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#ifndef _BLACKFIN_DPMC_H_
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#define _BLACKFIN_DPMC_H_
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
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void deep_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
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void hibernate_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
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void sleep_deeper(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2);
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void do_hibernate(int wakeup);
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void set_dram_srfs(void);
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void unset_dram_srfs(void);
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#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16))
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struct bfin_dpmc_platform_data {
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const unsigned int *tuple_tab;
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unsigned short tabsize;
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unsigned short vr_settling_time; /* in us */
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};
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#else
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#define PM_PUSH(x) \
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R0 = [P0 + (x - SRAM_BASE_ADDRESS)];\
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[--SP] = R0;\
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#define PM_POP(x) \
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R0 = [SP++];\
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[P0 + (x - SRAM_BASE_ADDRESS)] = R0;\
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#define PM_SYS_PUSH(x) \
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R0 = [P0 + (x - PLL_CTL)];\
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[--SP] = R0;\
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#define PM_SYS_POP(x) \
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R0 = [SP++];\
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[P0 + (x - PLL_CTL)] = R0;\
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#define PM_SYS_PUSH16(x) \
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R0 = w[P0 + (x - PLL_CTL)];\
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[--SP] = R0;\
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#define PM_SYS_POP16(x) \
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R0 = [SP++];\
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w[P0 + (x - PLL_CTL)] = R0;\
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#endif
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#endif /* __KERNEL__ */
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#endif /*_BLACKFIN_DPMC_H_*/
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