710fa3c811
Replaces PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM with direct struct pci_channel access. This allows us to have more than one pci channel. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
46 lines
1.4 KiB
C
46 lines
1.4 KiB
C
/*
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* arch/sh/drivers/pci/fixups-r7780rp.c
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*
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* Highlander R7780RP-1 PCI fixups
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*
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* Copyright (C) 2003 Lineo uSolutions, Inc.
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* Copyright (C) 2004 - 2006 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/pci.h>
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#include "pci-sh4.h"
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#include <asm/io.h>
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int pci_fixup_pcic(struct pci_channel *chan)
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{
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pci_write_reg(chan, 0x000043ff, SH4_PCIINTM);
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pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
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pci_write_reg(chan, 0xfbb00047, SH7780_PCICMD);
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pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR);
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pci_write_reg(chan, 0x00011912, SH7780_PCISVID);
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pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0);
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pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0);
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pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1);
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pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1);
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pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0);
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pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0);
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#ifdef CONFIG_32BIT
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pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2);
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pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
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#endif
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/* Set IOBR for windows containing area specified in pci.h */
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pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1),
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SH7780_PCIIOBR);
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pci_write_reg(chan, ((SH7780_PCI_IO_SIZE-1) & (7<<18)),
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SH7780_PCIIOBMR);
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return 0;
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}
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