86cd4f5f83
Samsung S5PC100 has 3 SDHCI controllers compatible with the one known from previous SoCs series. Add required platform setup and support code that the devices can be used with sdhci-s3c driver. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
126 lines
2.7 KiB
C
126 lines
2.7 KiB
C
/* linux/arch/arm/mach-s5pc100/cpu.c
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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*
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* Based on mach-s3c6410/cpu.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <asm/proc-fns.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <mach/map.h>
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#include <asm/irq.h>
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#include <plat/cpu-freq.h>
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#include <plat/regs-serial.h>
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#include <plat/regs-power.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/clock.h>
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#include <plat/sdhci.h>
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#include <plat/iic-core.h>
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#include <plat/s5pc100.h>
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/* Initial IO mappings */
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static struct map_desc s5pc100_iodesc[] __initdata = {
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};
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static void s5pc100_idle(void)
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{
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unsigned long tmp;
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tmp = __raw_readl(S5PC100_PWR_CFG);
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tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE;
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tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK;
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tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE;
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__raw_writel(tmp, S5PC100_PWR_CFG);
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tmp = __raw_readl(S5PC100_OTHERS);
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tmp |= S5PC100_PMU_INT_DISABLE;
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__raw_writel(tmp, S5PC100_OTHERS);
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cpu_do_idle();
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}
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/* s5pc100_map_io
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*
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* register the standard cpu IO areas
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*/
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void __init s5pc100_map_io(void)
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{
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iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc));
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/* initialise device information early */
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s5pc100_default_sdhci0();
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s5pc100_default_sdhci1();
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s5pc100_default_sdhci2();
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/* the i2c devices are directly compatible with s3c2440 */
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s3c_i2c0_setname("s3c2440-i2c");
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s3c_i2c1_setname("s3c2440-i2c");
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}
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void __init s5pc100_init_clocks(int xtal)
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{
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printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
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s3c24xx_register_baseclocks(xtal);
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s5pc1xx_register_clocks();
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s5pc100_register_clocks();
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s5pc100_setup_clocks();
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}
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void __init s5pc100_init_irq(void)
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{
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u32 vic_valid[] = {~0, ~0, ~0};
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/* VIC0, VIC1, and VIC2 are fully populated. */
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s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid));
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}
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struct sysdev_class s5pc100_sysclass = {
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.name = "s5pc100-core",
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};
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static struct sys_device s5pc100_sysdev = {
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.cls = &s5pc100_sysclass,
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};
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static int __init s5pc100_core_init(void)
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{
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return sysdev_class_register(&s5pc100_sysclass);
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}
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core_initcall(s5pc100_core_init);
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int __init s5pc100_init(void)
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{
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printk(KERN_DEBUG "S5PC100: Initialising architecture\n");
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s5pc1xx_idle = s5pc100_idle;
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return sysdev_register(&s5pc100_sysdev);
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}
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