7edcb9abb5
Add an ability to utilize the internal SRAM buffer on ICH4 and newer host controllers to speed up execution of block operations. I've split the code so that it is more clear which block transaction is performed. First of all the host controller's type is identified. isich4 is set when we think that the controller has the internal buffer. Then, before every block transaction, if isich4 is set, we attempt to enable the E32B bit in SMBAUXCTL register. Signed-off-by: Oleg Ryjkov <olegr@google.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
132 lines
4.8 KiB
Text
132 lines
4.8 KiB
Text
Kernel driver i2c-i801
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Supported adapters:
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* Intel 82801AA and 82801AB (ICH and ICH0 - part of the
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'810' and '810E' chipsets)
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* Intel 82801BA (ICH2 - part of the '815E' chipset)
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* Intel 82801CA/CAM (ICH3)
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* Intel 82801DB (ICH4) (HW PEC supported)
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* Intel 82801EB/ER (ICH5) (HW PEC supported)
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* Intel 6300ESB
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* Intel 82801FB/FR/FW/FRW (ICH6)
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* Intel 82801G (ICH7)
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* Intel 631xESB/632xESB (ESB2)
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* Intel 82801H (ICH8)
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* Intel ICH9
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Datasheets: Publicly available at the Intel website
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Authors:
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Frodo Looijaard <frodol@dds.nl>,
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Philip Edelbrock <phil@netroedge.com>,
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Mark Studebaker <mdsxyz123@yahoo.com>
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Module Parameters
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-----------------
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None.
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Description
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-----------
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The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA),
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ICH3 (82801CA/CAM) and later devices are Intel chips that are a part of
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Intel's '810' chipset for Celeron-based PCs, '810E' chipset for
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Pentium-based PCs, '815E' chipset, and others.
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The ICH chips contain at least SEVEN separate PCI functions in TWO logical
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PCI devices. An output of lspci will show something similar to the
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following:
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00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01)
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00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01)
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00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01)
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00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01)
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00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01)
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The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial
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Controller.
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The ICH chips are quite similar to Intel's PIIX4 chip, at least in the
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SMBus controller.
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Process Call Support
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--------------------
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Not supported.
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I2C Block Read Support
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----------------------
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Not supported at the moment.
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SMBus 2.0 Support
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-----------------
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The 82801DB (ICH4) and later chips support several SMBus 2.0 features.
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Hidden ICH SMBus
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----------------
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If your system has an Intel ICH south bridge, but you do NOT see the
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SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the
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BIOS to enable it, it means it has been hidden by the BIOS code. Asus is
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well known for first doing this on their P4B motherboard, and many other
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boards after that. Some vendor machines are affected as well.
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The first thing to try is the "i2c_ec" ACPI driver. It could be that the
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SMBus was hidden on purpose because it'll be driven by ACPI. If the
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i2c_ec driver works for you, just forget about the i2c-i801 driver and
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don't try to unhide the ICH SMBus. Even if i2c_ec doesn't work, you
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better make sure that the SMBus isn't used by the ACPI code. Try loading
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the "fan" and "thermal" drivers, and check in /proc/acpi/fan and
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/proc/acpi/thermal_zone. If you find anything there, it's likely that
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the ACPI is accessing the SMBus and it's safer not to unhide it. Only
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once you are certain that ACPI isn't using the SMBus, you can attempt
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to unhide it.
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In order to unhide the SMBus, we need to change the value of a PCI
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register before the kernel enumerates the PCI devices. This is done in
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drivers/pci/quirks.c, where all affected boards must be listed (see
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function asus_hides_smbus_hostbridge.) If the SMBus device is missing,
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and you think there's something interesting on the SMBus (e.g. a
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hardware monitoring chip), you need to add your board to the list.
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The motherboard is identified using the subvendor and subdevice IDs of the
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host bridge PCI device. Get yours with "lspci -n -v -s 00:00.0":
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00:00.0 Class 0600: 8086:2570 (rev 02)
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Subsystem: 1043:80f2
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Flags: bus master, fast devsel, latency 0
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Memory at fc000000 (32-bit, prefetchable) [size=32M]
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Capabilities: [e4] #09 [2106]
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Capabilities: [a0] AGP version 3.0
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Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043
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(Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic
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names for the bridge ID and the subvendor ID in include/linux/pci_ids.h,
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and then add a case for your subdevice ID at the right place in
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drivers/pci/quirks.c. Then please give it very good testing, to make sure
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that the unhidden SMBus doesn't conflict with e.g. ACPI.
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If it works, proves useful (i.e. there are usable chips on the SMBus)
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and seems safe, please submit a patch for inclusion into the kernel.
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Note: There's a useful script in lm_sensors 2.10.2 and later, named
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unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to
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temporarily unhide the SMBus without having to patch and recompile your
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kernel. It's very convenient if you just want to check if there's
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anything interesting on your hidden ICH SMBus.
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**********************
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The lm_sensors project gratefully acknowledges the support of Texas
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Instruments in the initial development of this driver.
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The lm_sensors project gratefully acknowledges the support of Intel in the
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development of SMBus 2.0 / ICH4 features of this driver.
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