63551ae0fe
A lot of the code in arch/*/mm/hugetlbpage.c is quite similar. This patch attempts to consolidate a lot of the code across the arch's, putting the combined version in mm/hugetlb.c. There are a couple of uglyish hacks in order to covert all the hugepage archs, but the result is a very large reduction in the total amount of code. It also means things like hugepage lazy allocation could be implemented in one place, instead of six. Tested, at least a little, on ppc64, i386 and x86_64. Notes: - this patch changes the meaning of set_huge_pte() to be more analagous to set_pte() - does SH4 need s special huge_ptep_get_and_clear()?? Acked-by: William Lee Irwin <wli@holomorphy.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
163 lines
3.2 KiB
C
163 lines
3.2 KiB
C
/*
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* SPARC64 Huge TLB page support.
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*
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* Copyright (C) 2002, 2003 David S. Miller (davem@redhat.com)
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*/
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/hugetlb.h>
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#include <linux/pagemap.h>
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#include <linux/smp_lock.h>
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#include <linux/slab.h>
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#include <linux/sysctl.h>
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#include <asm/mman.h>
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#include <asm/pgalloc.h>
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#include <asm/tlb.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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#include <asm/mmu_context.h>
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pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte = NULL;
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pgd = pgd_offset(mm, addr);
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if (pgd) {
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pud = pud_offset(pgd, addr);
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if (pud) {
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pmd = pmd_alloc(mm, pud, addr);
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if (pmd)
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pte = pte_alloc_map(mm, pmd, addr);
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}
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}
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return pte;
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}
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pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
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{
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte = NULL;
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pgd = pgd_offset(mm, addr);
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if (pgd) {
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pud = pud_offset(pgd, addr);
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if (pud) {
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pmd = pmd_offset(pud, addr);
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if (pmd)
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pte = pte_offset_map(pmd, addr);
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}
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}
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return pte;
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}
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#define mk_pte_huge(entry) do { pte_val(entry) |= _PAGE_SZHUGE; } while (0)
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void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t entry)
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{
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int i;
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for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
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set_pte_at(mm, addr, ptep, entry);
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ptep++;
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addr += PAGE_SIZE;
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pte_val(entry) += PAGE_SIZE;
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}
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}
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pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep)
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{
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pte_t entry;
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int i;
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entry = *ptep;
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for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
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pte_clear(mm, addr, ptep);
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addr += PAGE_SIZE;
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ptep++;
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}
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return entry;
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}
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/*
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* This function checks for proper alignment of input addr and len parameters.
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*/
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int is_aligned_hugepage_range(unsigned long addr, unsigned long len)
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{
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if (len & ~HPAGE_MASK)
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return -EINVAL;
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if (addr & ~HPAGE_MASK)
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return -EINVAL;
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return 0;
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}
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struct page *follow_huge_addr(struct mm_struct *mm,
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unsigned long address, int write)
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{
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return ERR_PTR(-EINVAL);
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}
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int pmd_huge(pmd_t pmd)
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{
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return 0;
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}
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struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,
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pmd_t *pmd, int write)
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{
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return NULL;
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}
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static void context_reload(void *__data)
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{
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struct mm_struct *mm = __data;
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if (mm == current->mm)
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load_secondary_context(mm);
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}
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void hugetlb_prefault_arch_hook(struct mm_struct *mm)
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{
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/* On UltraSPARC-III+ and later, configure the second half of
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* the Data-TLB for huge pages.
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*/
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if (tlb_type == cheetah_plus) {
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unsigned long ctx;
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spin_lock(&ctx_alloc_lock);
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ctx = mm->context.sparc64_ctx_val;
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ctx &= ~CTX_PGSZ_MASK;
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ctx |= CTX_PGSZ_BASE << CTX_PGSZ0_SHIFT;
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ctx |= CTX_PGSZ_HUGE << CTX_PGSZ1_SHIFT;
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if (ctx != mm->context.sparc64_ctx_val) {
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/* When changing the page size fields, we
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* must perform a context flush so that no
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* stale entries match. This flush must
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* occur with the original context register
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* settings.
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*/
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do_flush_tlb_mm(mm);
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/* Reload the context register of all processors
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* also executing in this address space.
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*/
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mm->context.sparc64_ctx_val = ctx;
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on_each_cpu(context_reload, mm, 0, 0);
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}
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spin_unlock(&ctx_alloc_lock);
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}
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}
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