b446197cc1
This patch finishes the port and enables debug as an build option. This was tested on: Atheros AR5213A chip found (MAC: 0x59, PHY: 0x43) RF5112A multiband radio found (0x36) Note: For 2 GHz band on the above card I noticed we get negative channel numbers. Will look into this unless someone beats me to it. Example out put when loading using: sudo modprobe ath5k debug=0x00000400 Band 2 GHz: channels 26, rates 12 channels: 1 2412 00c0 0000 2 2417 00c0 0000 3 2422 00c0 0000 4 2427 00c0 0000 5 2432 00c0 0000 6 2437 00c0 0000 7 2442 00c0 0000 8 2447 00c0 0000 9 2452 00c0 0000 10 2457 00c0 0000 11 2462 00c0 0000 12 2467 00c0 0000 13 2472 00c0 0000 14 2484 00c0 0000 -498 2512 00c0 0000 -494 2532 00c0 0000 -490 2552 00c0 0000 -486 2572 00c0 0000 -482 2592 00c0 0000 -478 2612 00c0 0000 -474 2632 00c0 0000 -470 2652 00c0 0000 -466 2672 00c0 0000 -462 2692 00c0 0000 -458 2712 00c0 0000 -454 2732 00c0 0000 Band 5 GHz: channels 194, rates 8 channels: 27 5135 0140 0000 28 5140 0140 0000 [... etc ] 219 6095 0140 0000 220 6100 0140 0000 rates: 60 000b 0000 0000 90 000f 0000 0000 120 000a 0000 0000 180 000e 0000 0000 240 0009 0000 0000 360 000d 0000 0000 480 0008 0000 0000 540 000c 0000 0000 Changes to base.c, base.h Changes-licensed-under: 3-Clause-BSD Changes to debug.c, debug.h Changes-licensed-under: GPL Signed-off-by: Luis R. Rodriguez <mcgrof@winlab.rutgers.edu> Signed-off-by: John W. Linville <linville@tuxdriver.com>
187 lines
6.6 KiB
C
187 lines
6.6 KiB
C
/*-
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* Copyright (c) 2002-2007 Sam Leffler, Errno Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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*/
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/*
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* Defintions for the Atheros Wireless LAN controller driver.
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*/
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#ifndef _DEV_ATH_ATHVAR_H
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#define _DEV_ATH_ATHVAR_H
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/wireless.h>
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#include <linux/if_ether.h>
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#include "ath5k.h"
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#include "debug.h"
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#define ATH_RXBUF 40 /* number of RX buffers */
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#define ATH_TXBUF 200 /* number of TX buffers */
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#define ATH_BCBUF 1 /* number of beacon buffers */
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struct ath5k_buf {
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struct list_head list;
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unsigned int flags; /* tx descriptor flags */
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struct ath5k_desc *desc; /* virtual addr of desc */
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dma_addr_t daddr; /* physical addr of desc */
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struct sk_buff *skb; /* skbuff for buf */
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dma_addr_t skbaddr;/* physical addr of skb data */
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struct ieee80211_tx_control ctl;
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};
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/*
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* Data transmit queue state. One of these exists for each
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* hardware transmit queue. Packets sent to us from above
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* are assigned to queues based on their priority. Not all
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* devices support a complete set of hardware transmit queues.
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* For those devices the array sc_ac2q will map multiple
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* priorities to fewer hardware queues (typically all to one
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* hardware queue).
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*/
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struct ath5k_txq {
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unsigned int qnum; /* hardware q number */
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u32 *link; /* link ptr in last TX desc */
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struct list_head q; /* transmit queue */
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spinlock_t lock; /* lock on q and link */
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bool setup;
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};
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#if CHAN_DEBUG
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#define ATH_CHAN_MAX (26+26+26+200+200)
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#else
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#define ATH_CHAN_MAX (14+14+14+252+20)
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#endif
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/* Software Carrier, keeps track of the driver state
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* associated with an instance of a device */
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struct ath5k_softc {
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struct pci_dev *pdev; /* for dma mapping */
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void __iomem *iobase; /* address of the device */
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struct mutex lock; /* dev-level lock */
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struct ieee80211_tx_queue_stats tx_stats;
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struct ieee80211_low_level_stats ll_stats;
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struct ieee80211_hw *hw; /* IEEE 802.11 common */
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struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
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struct ieee80211_channel channels[ATH_CHAN_MAX];
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struct ieee80211_rate rates[AR5K_MAX_RATES * IEEE80211_NUM_BANDS];
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enum ieee80211_if_types opmode;
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struct ath5k_hw *ah; /* Atheros HW */
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struct ieee80211_supported_band *curband;
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u8 a_rates;
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u8 b_rates;
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u8 g_rates;
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u8 xr_rates;
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#ifdef CONFIG_ATH5K_DEBUG
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struct ath5k_dbg_info debug; /* debug info */
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#endif /* CONFIG_ATH5K_DEBUG */
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struct ath5k_buf *bufptr; /* allocated buffer ptr */
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struct ath5k_desc *desc; /* TX/RX descriptors */
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dma_addr_t desc_daddr; /* DMA (physical) address */
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size_t desc_len; /* size of TX/RX descriptors */
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u16 cachelsz; /* cache line size */
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DECLARE_BITMAP(status, 6);
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#define ATH_STAT_INVALID 0 /* disable hardware accesses */
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#define ATH_STAT_MRRETRY 1 /* multi-rate retry support */
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#define ATH_STAT_PROMISC 2
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#define ATH_STAT_LEDBLINKING 3 /* LED blink operation active */
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#define ATH_STAT_LEDENDBLINK 4 /* finish LED blink operation */
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#define ATH_STAT_LEDSOFT 5 /* enable LED gpio status */
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unsigned int filter_flags; /* HW flags, AR5K_RX_FILTER_* */
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unsigned int curmode; /* current phy mode */
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struct ieee80211_channel *curchan; /* current h/w channel */
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struct ieee80211_vif *vif;
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struct {
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u8 rxflags; /* radiotap rx flags */
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u8 txflags; /* radiotap tx flags */
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u16 ledon; /* softled on time */
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u16 ledoff; /* softled off time */
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} hwmap[32]; /* h/w rate ix mappings */
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enum ath5k_int imask; /* interrupt mask copy */
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DECLARE_BITMAP(keymap, AR5K_KEYCACHE_SIZE); /* key use bit map */
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u8 bssidmask[ETH_ALEN];
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unsigned int led_pin, /* GPIO pin for driving LED */
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led_on, /* pin setting for LED on */
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led_off; /* off time for current blink */
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struct timer_list led_tim; /* led off timer */
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u8 led_rxrate; /* current rx rate for LED */
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u8 led_txrate; /* current tx rate for LED */
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struct tasklet_struct restq; /* reset tasklet */
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unsigned int rxbufsize; /* rx size based on mtu */
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struct list_head rxbuf; /* receive buffer */
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spinlock_t rxbuflock;
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u32 *rxlink; /* link ptr in last RX desc */
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struct tasklet_struct rxtq; /* rx intr tasklet */
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struct list_head txbuf; /* transmit buffer */
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spinlock_t txbuflock;
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unsigned int txbuf_len; /* buf count in txbuf list */
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struct ath5k_txq txqs[2]; /* beacon and tx */
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struct ath5k_txq *txq; /* beacon and tx*/
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struct tasklet_struct txtq; /* tx intr tasklet */
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struct ath5k_buf *bbuf; /* beacon buffer */
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unsigned int bhalq, /* SW q for outgoing beacons */
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bmisscount, /* missed beacon transmits */
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bintval, /* beacon interval in TU */
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bsent;
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unsigned int nexttbtt; /* next beacon time in TU */
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struct timer_list calib_tim; /* calibration timer */
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int power_level; /* Requested tx power in dbm */
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};
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#define ath5k_hw_hasbssidmask(_ah) \
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(ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0)
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#define ath5k_hw_hasveol(_ah) \
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(ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
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#endif
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