android_kernel_motorola_sm6225/arch/x86/kernel/cpu
Ajaykumar Hotchandani 8dbf4a3003 x86/mtrr: Resolve inconsistency with Intel processor manual
Following is from Notes of section 11.5.3 of Intel processor
manual available at:

  http://www.intel.com/Assets/PDF/manual/325384.pdf

For the Pentium 4 and Intel Xeon processors, after the sequence of
steps given above has been executed, the cache lines containing the
code between the end of the WBINVD instruction and before the
MTRRS have actually been disabled may be retained in the cache
hierarchy. Here, to remove code from the cache completely, a
second WBINVD instruction must be executed after the MTRRs have
been disabled.

This patch provides resolution for that.

Ideally, I will like to make changes only for Pentium 4 and Xeon
processors. But, I am not finding easier way to do it.
And, extra wbinvd() instruction does not hurt much for other
processors.

Signed-off-by: Ajaykumar Hotchandani <ajaykumar.hotchandani@oracle.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@profusion.mobi>
Link: http://lkml.kernel.org/r/4EBD1CC5.3030008@oracle.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2011-12-05 15:06:15 +01:00
..
mcheck x86/mce: Make mce_chrdev_ops 'static const' 2011-11-08 16:17:11 +01:00
mtrr x86/mtrr: Resolve inconsistency with Intel processor manual 2011-12-05 15:06:15 +01:00
.gitignore
amd.c x86: Fix boot failures on older AMD CPU's 2011-12-04 11:57:09 -08:00
bugs.c x86-32, fpu: Fix DNA exception during check_fpu() 2011-06-30 17:29:47 -07:00
bugs_64.c
centaur.c x86, cpu: mv display_cacheinfo -> cpu_detect_cache_sizes 2009-11-23 11:59:53 -08:00
common.c Merge branch 'x86-rdrand-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2011-10-28 05:29:07 -07:00
cpu.h x86: Add a BSP cpu_dev helper 2011-08-05 12:26:49 -07:00
cyrix.c x86, cpu: mv display_cacheinfo -> cpu_detect_cache_sizes 2009-11-23 11:59:53 -08:00
hypervisor.c x86, hyper: Change hypervisor detection order 2011-07-08 16:22:29 -07:00
intel.c x86, intel: Use c->microcode for Atom errata check 2011-10-14 13:16:38 +02:00
intel_cacheinfo.c x86: cache_info: Update calculation of AMD L3 cache indices 2011-09-12 19:29:03 +02:00
Makefile Merge branch 'x86-rdrand-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2011-10-28 05:29:07 -07:00
mkcapflags.pl
mshyperv.c x86: Hyper-V: Integrate the clocksource with Hyper-V detection code 2011-09-08 10:33:59 +02:00
perf_event.c x86, nmi: Wire up NMI handlers to new routines 2011-10-10 06:56:57 +02:00
perf_event.h perf, intel: Use GO/HO bits in perf-ctr 2011-10-10 06:56:42 +02:00
perf_event_amd.c perf, x86: Share IBS macros between perf and oprofile 2011-10-10 06:57:11 +02:00
perf_event_amd_ibs.c perf, x86: Implement IBS initialization 2011-10-10 06:57:16 +02:00
perf_event_intel.c x86: Fix files explicitly requiring export.h for EXPORT_SYMBOL/THIS_MODULE 2011-10-31 19:30:35 -04:00
perf_event_intel_ds.c x86, perf: Clean up perf_event cpu code 2011-09-26 12:58:00 +02:00
perf_event_intel_lbr.c x86, perf: Clean up perf_event cpu code 2011-09-26 12:58:00 +02:00
perf_event_p4.c x86, perf: Clean up perf_event cpu code 2011-09-26 12:58:00 +02:00
perf_event_p6.c x86, perf: Clean up perf_event cpu code 2011-09-26 12:58:00 +02:00
perfctr-watchdog.c perf, x86: Add new AMD family 15h msrs to perfctr reservation code 2011-02-16 13:30:50 +01:00
powerflags.c
proc.c x86, microcode: Correct microcode revision format 2011-10-19 15:47:48 +02:00
rdrand.c x86, random: Verify RDRAND functionality and allow it to be disabled 2011-07-31 14:02:19 -07:00
scattered.c Merge branch 'x86-amd-nb-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip 2010-10-21 13:01:08 -07:00
sched.c sched: x86: Name old_perf in a unique way 2009-09-16 11:21:07 +02:00
topology.c x86, cpu: Split addon_cpuid_features.c 2010-07-19 19:02:41 -07:00
transmeta.c x86, cpu: mv display_cacheinfo -> cpu_detect_cache_sizes 2009-11-23 11:59:53 -08:00
umc.c
vmware.c x86: Fix common misspellings 2011-03-18 10:39:30 +01:00