9aadd70aed
This reverts commit 3db11feffc
(ARM: OMAP: convert I2C driver to PM QoS for MPU latency constraints).
This commit causes I2C timeouts to appear on several OMAP3430/3530-based
boards:
http://marc.info/?l=linux-arm-kernel&m=135071372426971&w=2
http://marc.info/?l=linux-arm-kernel&m=135067558415214&w=2
http://marc.info/?l=linux-arm-kernel&m=135216013608196&w=2
and appears to have been sent for merging before one of its prerequisites
was merged:
http://marc.info/?l=linux-arm-kernel&m=135219411617621&w=2
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
40 lines
1.3 KiB
C
40 lines
1.3 KiB
C
#ifndef __I2C_OMAP_H__
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#define __I2C_OMAP_H__
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#include <linux/platform_device.h>
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/*
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* Version 2 of the I2C peripheral unit has a different register
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* layout and extra registers. The ID register in the V2 peripheral
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* unit on the OMAP4430 reports the same ID as the V1 peripheral
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* unit on the OMAP3530, so we must inform the driver which IP
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* version we know it is running on from platform / cpu-specific
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* code using these constants in the hwmod class definition.
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*/
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#define OMAP_I2C_IP_VERSION_1 1
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#define OMAP_I2C_IP_VERSION_2 2
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/* struct omap_i2c_bus_platform_data .flags meanings */
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#define OMAP_I2C_FLAG_NO_FIFO BIT(0)
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#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1)
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#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2)
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#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3)
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#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4)
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#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5)
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#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6)
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/* how the CPU address bus must be translated for I2C unit access */
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#define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0
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#define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7)
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#define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8)
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#define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7
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struct omap_i2c_bus_platform_data {
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u32 clkrate;
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u32 rev;
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u32 flags;
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void (*set_mpu_wkup_lat)(struct device *dev, long set);
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};
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#endif
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