9def7ccfe8
The dual-core Cortex A7 rk3036 is a bit special in that it does not allow to control the actual powerdomain of the cpu cores, while the rest of the smp-bringup like reset control and entry address handling stays the same. Its bigger sibling, the quad-core rk3128 again allows powerdomain control. So allow that case by introducing a separate smp-enable-method, that simply disables powerdomain handling in the common code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Xing Zheng <zhengxing@rock-chips.com> Acked-by: Rob Herring <robh@kernel.org> |
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| .. | ||
| core.h | ||
| headsmp.S | ||
| Kconfig | ||
| Makefile | ||
| platsmp.c | ||
| pm.c | ||
| pm.h | ||
| rockchip.c | ||
| sleep.S | ||