8f4e956b31
When a machine check or NMI occurs while multiple byte code is patched the CPU could theoretically see an inconsistent instruction and crash. Prevent this by temporarily disabling MCEs and returning early in the NMI handler. Based on discussion with Mathieu Desnoyers. Cc: Mathieu Desnoyers <compudj@krystal.dyndns.org> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
483 lines
11 KiB
C
483 lines
11 KiB
C
/*
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* linux/arch/x86_64/nmi.c
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*
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* NMI watchdog support on APIC systems
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*
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* Started by Ingo Molnar <mingo@redhat.com>
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*
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* Fixes:
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* Mikael Pettersson : AMD K7 support for local APIC NMI watchdog.
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* Mikael Pettersson : Power Management for local APIC NMI watchdog.
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* Pavel Machek and
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* Mikael Pettersson : PM converted to driver model. Disable/enable API.
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*/
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#include <linux/nmi.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/sysdev.h>
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#include <linux/sysctl.h>
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#include <linux/kprobes.h>
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#include <linux/cpumask.h>
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#include <linux/kdebug.h>
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#include <asm/smp.h>
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#include <asm/nmi.h>
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#include <asm/proto.h>
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#include <asm/mce.h>
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int unknown_nmi_panic;
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int nmi_watchdog_enabled;
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int panic_on_unrecovered_nmi;
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static cpumask_t backtrace_mask = CPU_MASK_NONE;
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/* nmi_active:
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* >0: the lapic NMI watchdog is active, but can be disabled
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* <0: the lapic NMI watchdog has not been set up, and cannot
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* be enabled
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* 0: the lapic NMI watchdog is disabled, but can be enabled
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*/
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atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */
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int panic_on_timeout;
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unsigned int nmi_watchdog = NMI_DEFAULT;
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static unsigned int nmi_hz = HZ;
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static DEFINE_PER_CPU(short, wd_enabled);
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/* local prototypes */
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static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu);
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/* Run after command line and cpu_init init, but before all other checks */
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void nmi_watchdog_default(void)
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{
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if (nmi_watchdog != NMI_DEFAULT)
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return;
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nmi_watchdog = NMI_NONE;
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}
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static int endflag __initdata = 0;
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#ifdef CONFIG_SMP
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/* The performance counters used by NMI_LOCAL_APIC don't trigger when
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* the CPU is idle. To make sure the NMI watchdog really ticks on all
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* CPUs during the test make them busy.
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*/
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static __init void nmi_cpu_busy(void *data)
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{
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local_irq_enable_in_hardirq();
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/* Intentionally don't use cpu_relax here. This is
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to make sure that the performance counter really ticks,
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even if there is a simulator or similar that catches the
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pause instruction. On a real HT machine this is fine because
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all other CPUs are busy with "useless" delay loops and don't
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care if they get somewhat less cycles. */
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while (endflag == 0)
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mb();
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}
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#endif
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int __init check_nmi_watchdog (void)
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{
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int *counts;
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int cpu;
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if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DEFAULT))
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return 0;
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if (!atomic_read(&nmi_active))
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return 0;
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counts = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
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if (!counts)
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return -1;
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printk(KERN_INFO "testing NMI watchdog ... ");
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#ifdef CONFIG_SMP
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if (nmi_watchdog == NMI_LOCAL_APIC)
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smp_call_function(nmi_cpu_busy, (void *)&endflag, 0, 0);
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#endif
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for (cpu = 0; cpu < NR_CPUS; cpu++)
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counts[cpu] = cpu_pda(cpu)->__nmi_count;
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local_irq_enable();
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mdelay((20*1000)/nmi_hz); // wait 20 ticks
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for_each_online_cpu(cpu) {
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if (!per_cpu(wd_enabled, cpu))
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continue;
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if (cpu_pda(cpu)->__nmi_count - counts[cpu] <= 5) {
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printk("CPU#%d: NMI appears to be stuck (%d->%d)!\n",
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cpu,
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counts[cpu],
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cpu_pda(cpu)->__nmi_count);
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per_cpu(wd_enabled, cpu) = 0;
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atomic_dec(&nmi_active);
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}
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}
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if (!atomic_read(&nmi_active)) {
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kfree(counts);
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atomic_set(&nmi_active, -1);
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endflag = 1;
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return -1;
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}
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endflag = 1;
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printk("OK.\n");
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/* now that we know it works we can reduce NMI frequency to
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something more reasonable; makes a difference in some configs */
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if (nmi_watchdog == NMI_LOCAL_APIC)
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nmi_hz = lapic_adjust_nmi_hz(1);
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kfree(counts);
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return 0;
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}
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int __init setup_nmi_watchdog(char *str)
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{
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int nmi;
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if (!strncmp(str,"panic",5)) {
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panic_on_timeout = 1;
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str = strchr(str, ',');
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if (!str)
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return 1;
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++str;
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}
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get_option(&str, &nmi);
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if ((nmi >= NMI_INVALID) || (nmi < NMI_NONE))
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return 0;
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nmi_watchdog = nmi;
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return 1;
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}
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__setup("nmi_watchdog=", setup_nmi_watchdog);
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static void __acpi_nmi_disable(void *__unused)
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{
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apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED);
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}
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/*
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* Disable timer based NMIs on all CPUs:
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*/
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void acpi_nmi_disable(void)
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{
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if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
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on_each_cpu(__acpi_nmi_disable, NULL, 0, 1);
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}
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static void __acpi_nmi_enable(void *__unused)
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{
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apic_write(APIC_LVT0, APIC_DM_NMI);
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}
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/*
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* Enable timer based NMIs on all CPUs:
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*/
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void acpi_nmi_enable(void)
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{
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if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC)
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on_each_cpu(__acpi_nmi_enable, NULL, 0, 1);
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}
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#ifdef CONFIG_PM
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static int nmi_pm_active; /* nmi_active before suspend */
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static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state)
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{
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/* only CPU0 goes here, other CPUs should be offline */
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nmi_pm_active = atomic_read(&nmi_active);
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stop_apic_nmi_watchdog(NULL);
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BUG_ON(atomic_read(&nmi_active) != 0);
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return 0;
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}
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static int lapic_nmi_resume(struct sys_device *dev)
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{
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/* only CPU0 goes here, other CPUs should be offline */
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if (nmi_pm_active > 0) {
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setup_apic_nmi_watchdog(NULL);
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touch_nmi_watchdog();
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}
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return 0;
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}
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static struct sysdev_class nmi_sysclass = {
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set_kset_name("lapic_nmi"),
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.resume = lapic_nmi_resume,
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.suspend = lapic_nmi_suspend,
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};
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static struct sys_device device_lapic_nmi = {
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.id = 0,
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.cls = &nmi_sysclass,
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};
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static int __init init_lapic_nmi_sysfs(void)
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{
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int error;
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/* should really be a BUG_ON but b/c this is an
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* init call, it just doesn't work. -dcz
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*/
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if (nmi_watchdog != NMI_LOCAL_APIC)
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return 0;
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if ( atomic_read(&nmi_active) < 0 )
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return 0;
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error = sysdev_class_register(&nmi_sysclass);
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if (!error)
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error = sysdev_register(&device_lapic_nmi);
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return error;
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}
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/* must come after the local APIC's device_initcall() */
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late_initcall(init_lapic_nmi_sysfs);
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#endif /* CONFIG_PM */
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void setup_apic_nmi_watchdog(void *unused)
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{
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if (__get_cpu_var(wd_enabled) == 1)
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return;
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/* cheap hack to support suspend/resume */
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/* if cpu0 is not active neither should the other cpus */
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if ((smp_processor_id() != 0) && (atomic_read(&nmi_active) <= 0))
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return;
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switch (nmi_watchdog) {
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case NMI_LOCAL_APIC:
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__get_cpu_var(wd_enabled) = 1;
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if (lapic_watchdog_init(nmi_hz) < 0) {
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__get_cpu_var(wd_enabled) = 0;
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return;
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}
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/* FALL THROUGH */
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case NMI_IO_APIC:
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__get_cpu_var(wd_enabled) = 1;
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atomic_inc(&nmi_active);
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}
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}
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void stop_apic_nmi_watchdog(void *unused)
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{
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/* only support LOCAL and IO APICs for now */
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if ((nmi_watchdog != NMI_LOCAL_APIC) &&
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(nmi_watchdog != NMI_IO_APIC))
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return;
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if (__get_cpu_var(wd_enabled) == 0)
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return;
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if (nmi_watchdog == NMI_LOCAL_APIC)
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lapic_watchdog_stop();
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__get_cpu_var(wd_enabled) = 0;
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atomic_dec(&nmi_active);
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}
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/*
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* the best way to detect whether a CPU has a 'hard lockup' problem
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* is to check it's local APIC timer IRQ counts. If they are not
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* changing then that CPU has some problem.
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*
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* as these watchdog NMI IRQs are generated on every CPU, we only
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* have to check the current processor.
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*/
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static DEFINE_PER_CPU(unsigned, last_irq_sum);
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static DEFINE_PER_CPU(local_t, alert_counter);
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static DEFINE_PER_CPU(int, nmi_touch);
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void touch_nmi_watchdog(void)
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{
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if (nmi_watchdog > 0) {
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unsigned cpu;
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/*
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* Tell other CPUs to reset their alert counters. We cannot
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* do it ourselves because the alert count increase is not
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* atomic.
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*/
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for_each_present_cpu(cpu) {
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if (per_cpu(nmi_touch, cpu) != 1)
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per_cpu(nmi_touch, cpu) = 1;
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}
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}
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touch_softlockup_watchdog();
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}
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int __kprobes nmi_watchdog_tick(struct pt_regs * regs, unsigned reason)
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{
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int sum;
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int touched = 0;
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int cpu = smp_processor_id();
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int rc = 0;
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/* check for other users first */
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if (notify_die(DIE_NMI, "nmi", regs, reason, 2, SIGINT)
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== NOTIFY_STOP) {
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rc = 1;
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touched = 1;
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}
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sum = read_pda(apic_timer_irqs);
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if (__get_cpu_var(nmi_touch)) {
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__get_cpu_var(nmi_touch) = 0;
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touched = 1;
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}
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if (cpu_isset(cpu, backtrace_mask)) {
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static DEFINE_SPINLOCK(lock); /* Serialise the printks */
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spin_lock(&lock);
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printk("NMI backtrace for cpu %d\n", cpu);
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dump_stack();
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spin_unlock(&lock);
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cpu_clear(cpu, backtrace_mask);
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}
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#ifdef CONFIG_X86_MCE
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/* Could check oops_in_progress here too, but it's safer
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not too */
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if (atomic_read(&mce_entry) > 0)
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touched = 1;
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#endif
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/* if the apic timer isn't firing, this cpu isn't doing much */
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if (!touched && __get_cpu_var(last_irq_sum) == sum) {
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/*
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* Ayiee, looks like this CPU is stuck ...
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* wait a few IRQs (5 seconds) before doing the oops ...
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*/
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local_inc(&__get_cpu_var(alert_counter));
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if (local_read(&__get_cpu_var(alert_counter)) == 5*nmi_hz)
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die_nmi("NMI Watchdog detected LOCKUP on CPU %d\n", regs,
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panic_on_timeout);
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} else {
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__get_cpu_var(last_irq_sum) = sum;
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local_set(&__get_cpu_var(alert_counter), 0);
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}
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/* see if the nmi watchdog went off */
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if (!__get_cpu_var(wd_enabled))
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return rc;
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switch (nmi_watchdog) {
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case NMI_LOCAL_APIC:
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rc |= lapic_wd_event(nmi_hz);
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break;
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case NMI_IO_APIC:
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/* don't know how to accurately check for this.
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* just assume it was a watchdog timer interrupt
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* This matches the old behaviour.
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*/
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rc = 1;
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break;
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}
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return rc;
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}
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static unsigned ignore_nmis;
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asmlinkage __kprobes void do_nmi(struct pt_regs * regs, long error_code)
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{
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nmi_enter();
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add_pda(__nmi_count,1);
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if (!ignore_nmis)
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default_do_nmi(regs);
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nmi_exit();
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}
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int do_nmi_callback(struct pt_regs * regs, int cpu)
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{
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#ifdef CONFIG_SYSCTL
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if (unknown_nmi_panic)
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return unknown_nmi_panic_callback(regs, cpu);
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#endif
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return 0;
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}
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void stop_nmi(void)
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{
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acpi_nmi_disable();
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ignore_nmis++;
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}
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void restart_nmi(void)
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{
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ignore_nmis--;
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acpi_nmi_enable();
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}
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#ifdef CONFIG_SYSCTL
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static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu)
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{
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unsigned char reason = get_nmi_reason();
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char buf[64];
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sprintf(buf, "NMI received for unknown reason %02x\n", reason);
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die_nmi(buf, regs, 1); /* Always panic here */
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return 0;
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}
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/*
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* proc handler for /proc/sys/kernel/nmi
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*/
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int proc_nmi_enabled(struct ctl_table *table, int write, struct file *file,
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void __user *buffer, size_t *length, loff_t *ppos)
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{
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int old_state;
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nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0;
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old_state = nmi_watchdog_enabled;
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proc_dointvec(table, write, file, buffer, length, ppos);
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if (!!old_state == !!nmi_watchdog_enabled)
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return 0;
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if (atomic_read(&nmi_active) < 0) {
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printk( KERN_WARNING "NMI watchdog is permanently disabled\n");
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return -EIO;
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}
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/* if nmi_watchdog is not set yet, then set it */
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nmi_watchdog_default();
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if (nmi_watchdog == NMI_LOCAL_APIC) {
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if (nmi_watchdog_enabled)
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enable_lapic_nmi_watchdog();
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else
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disable_lapic_nmi_watchdog();
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} else {
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printk( KERN_WARNING
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"NMI watchdog doesn't know what hardware to touch\n");
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return -EIO;
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}
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return 0;
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}
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#endif
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void __trigger_all_cpu_backtrace(void)
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{
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int i;
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backtrace_mask = cpu_online_map;
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/* Wait for up to 10 seconds for all CPUs to do the backtrace */
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for (i = 0; i < 10 * 1000; i++) {
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if (cpus_empty(backtrace_mask))
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break;
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mdelay(1);
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}
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}
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EXPORT_SYMBOL(nmi_active);
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EXPORT_SYMBOL(nmi_watchdog);
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EXPORT_SYMBOL(touch_nmi_watchdog);
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