c63b196afc
swsusp_arch_suspend() actually saves all cpu register contents on hibernation. Machine checks must be disabled since swsusp_arch_suspend() stores register contents to their lowcore save areas. That's the same place where register contents on machine checks would be saved. To avoid register corruption disable machine checks. We must also disable machine checks in the new psw mask for program checks, since swsusp_arch_suspend() may generate program checks. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
184 lines
4.5 KiB
ArmAsm
184 lines
4.5 KiB
ArmAsm
/*
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* S390 64-bit swsusp implementation
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*
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* Copyright IBM Corp. 2009
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*
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* Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
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* Michael Holzheu <holzheu@linux.vnet.ibm.com>
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*/
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#include <asm/page.h>
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#include <asm/ptrace.h>
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#include <asm/asm-offsets.h>
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/*
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* Save register context in absolute 0 lowcore and call swsusp_save() to
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* create in-memory kernel image. The context is saved in the designated
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* "store status" memory locations (see POP).
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* We return from this function twice. The first time during the suspend to
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* disk process. The second time via the swsusp_arch_resume() function
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* (see below) in the resume process.
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* This function runs with disabled interrupts.
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*/
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.section .text
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.align 2
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.globl swsusp_arch_suspend
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swsusp_arch_suspend:
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stmg %r6,%r15,__SF_GPRS(%r15)
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lgr %r1,%r15
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aghi %r15,-STACK_FRAME_OVERHEAD
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stg %r1,__SF_BACKCHAIN(%r15)
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/* Deactivate DAT */
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stnsm __SF_EMPTY(%r15),0xfb
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/* Store prefix register on stack */
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stpx __SF_EMPTY(%r15)
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/* Save prefix register contents for lowcore */
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llgf %r4,__SF_EMPTY(%r15)
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/* Get pointer to save area */
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lghi %r1,0x1000
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/* Store registers */
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mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
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stfpc 0x31c(%r1) /* store fpu control */
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std 0,0x200(%r1) /* store f0 */
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std 1,0x208(%r1) /* store f1 */
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std 2,0x210(%r1) /* store f2 */
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std 3,0x218(%r1) /* store f3 */
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std 4,0x220(%r1) /* store f4 */
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std 5,0x228(%r1) /* store f5 */
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std 6,0x230(%r1) /* store f6 */
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std 7,0x238(%r1) /* store f7 */
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std 8,0x240(%r1) /* store f8 */
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std 9,0x248(%r1) /* store f9 */
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std 10,0x250(%r1) /* store f10 */
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std 11,0x258(%r1) /* store f11 */
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std 12,0x260(%r1) /* store f12 */
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std 13,0x268(%r1) /* store f13 */
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std 14,0x270(%r1) /* store f14 */
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std 15,0x278(%r1) /* store f15 */
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stam %a0,%a15,0x340(%r1) /* store access registers */
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stctg %c0,%c15,0x380(%r1) /* store control registers */
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stmg %r0,%r15,0x280(%r1) /* store general registers */
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stpt 0x328(%r1) /* store timer */
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stckc 0x330(%r1) /* store clock comparator */
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/* Activate DAT */
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stosm __SF_EMPTY(%r15),0x04
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/* Set prefix page to zero */
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xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
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spx __SF_EMPTY(%r15)
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lghi %r2,0
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lghi %r3,2*PAGE_SIZE
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lghi %r5,2*PAGE_SIZE
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1: mvcle %r2,%r4,0
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jo 1b
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/* Save image */
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brasl %r14,swsusp_save
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/* Restore prefix register and return */
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lghi %r1,0x1000
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spx 0x318(%r1)
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lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
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lghi %r2,0
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br %r14
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/*
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* Restore saved memory image to correct place and restore register context.
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* Then we return to the function that called swsusp_arch_suspend().
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* swsusp_arch_resume() runs with disabled interrupts.
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*/
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.globl swsusp_arch_resume
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swsusp_arch_resume:
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stmg %r6,%r15,__SF_GPRS(%r15)
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lgr %r1,%r15
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aghi %r15,-STACK_FRAME_OVERHEAD
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stg %r1,__SF_BACKCHAIN(%r15)
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#ifdef CONFIG_SMP
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/* Save boot cpu number */
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brasl %r14,smp_get_phys_cpu_id
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lgr %r10,%r2
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#endif
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/* Deactivate DAT */
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stnsm __SF_EMPTY(%r15),0xfb
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/* Set prefix page to zero */
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xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
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spx __SF_EMPTY(%r15)
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/* Restore saved image */
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larl %r1,restore_pblist
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lg %r1,0(%r1)
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ltgr %r1,%r1
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jz 2f
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0:
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lg %r2,8(%r1)
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lg %r4,0(%r1)
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lghi %r3,PAGE_SIZE
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lghi %r5,PAGE_SIZE
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1:
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mvcle %r2,%r4,0
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jo 1b
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lg %r1,16(%r1)
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ltgr %r1,%r1
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jnz 0b
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2:
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ptlb /* flush tlb */
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/* Restore registers */
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lghi %r13,0x1000 /* %r1 = pointer to save arae */
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spt 0x328(%r13) /* reprogram timer */
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//sckc 0x330(%r13) /* set clock comparator */
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lctlg %c0,%c15,0x380(%r13) /* load control registers */
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lam %a0,%a15,0x340(%r13) /* load access registers */
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lfpc 0x31c(%r13) /* load fpu control */
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ld 0,0x200(%r13) /* load f0 */
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ld 1,0x208(%r13) /* load f1 */
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ld 2,0x210(%r13) /* load f2 */
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ld 3,0x218(%r13) /* load f3 */
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ld 4,0x220(%r13) /* load f4 */
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ld 5,0x228(%r13) /* load f5 */
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ld 6,0x230(%r13) /* load f6 */
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ld 7,0x238(%r13) /* load f7 */
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ld 8,0x240(%r13) /* load f8 */
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ld 9,0x248(%r13) /* load f9 */
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ld 10,0x250(%r13) /* load f10 */
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ld 11,0x258(%r13) /* load f11 */
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ld 12,0x260(%r13) /* load f12 */
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ld 13,0x268(%r13) /* load f13 */
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ld 14,0x270(%r13) /* load f14 */
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ld 15,0x278(%r13) /* load f15 */
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/* Load old stack */
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lg %r15,0x2f8(%r13)
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/* Pointer to save area */
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lghi %r13,0x1000
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#ifdef CONFIG_SMP
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/* Switch CPUs */
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lgr %r2,%r10 /* get cpu id */
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llgf %r3,0x318(%r13)
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brasl %r14,smp_switch_boot_cpu_in_resume
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#endif
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/* Restore prefix register */
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spx 0x318(%r13)
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/* Activate DAT */
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stosm __SF_EMPTY(%r15),0x04
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/* Return 0 */
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lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
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lghi %r2,0
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br %r14
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