65aa94b204
For OMAP3+ devices, the clock domains (CLKDMs) support one or more of the following transition modes ... NO_SLEEP (0x0) - A clock domain sleep transition is never initiated, irrespective of the hardware conditions. SW_SLEEP (0x1) - A software-forced sleep transition. The transition is initiated when the associated hardware conditions are satisfied SW_WKUP (0x2) - A software-forced clock domain wake-up transition is initiated, irrespective of the hardware conditions. HW_AUTO (0x3) - Hardware-controlled automatic sleep and wake-up transition is initiated by the PRCM module when the associated hardware conditions are satisfied. For OMAP4 devices, SW_SLEEP is equivalent to HW_AUTO and NO_SLEEP is equivalent to SW_WKUP. The only difference between HW_AUTO and SW_SLEEP for OMAP4 devices is that the PRM_IRQSTATUS_MPU.TRANSITION_ST interrupt status is set in case of SW_SLEEP transition, and not set in case of HW_AUTO transition. For OMAP4 devices, all CLKDMs support HW_AUTO and therefore we can place the CLKDMs in the HW_AUTO state instead of the SW_SLEEP mode. Hence, we do not need to use the SW_SLEEP mode. With regard to NO_SLEEP and SW_WKUP it is preferred to use SW_WKUP mode if the CLKDM supports it and so use this mode instead of NO_SLEEP where possible. For a software perspective the above 4 modes are represented by the following flags to indicate what modes are supported by each of the CLKDMs. CLKDM_CAN_DISABLE_AUTO --> NO_SLEEP CLKDM_CAN_ENABLE_AUTO --> HW_AUTO CLKDM_CAN_FORCE_SLEEP --> SW_SLEEP CLKDM_CAN_FORCE_WAKEUP --> SW_WKUP By eliminating the SW_SLEEP mode the the mapping of the flags for OMAP4 devices can becomes ... CLKDM_CAN_DISABLE_AUTO --> NO_SLEEP CLKDM_CAN_ENABLE_AUTO --> HW_AUTO CLKDM_CAN_FORCE_SLEEP --> HW_AUTO CLKDM_CAN_FORCE_WAKEUP --> SW_WKUP Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Reviewed-by: Benoit Cousson <b-cousson@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
140 lines
3.8 KiB
C
140 lines
3.8 KiB
C
/*
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* OMAP4 clockdomain control
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*
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* Copyright (C) 2008-2010 Texas Instruments, Inc.
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* Copyright (C) 2008-2010 Nokia Corporation
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*
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* Derived from mach-omap2/clockdomain.c written by Paul Walmsley
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* Rajendra Nayak <rnayak@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include "clockdomain.h"
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#include "cminst44xx.h"
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#include "cm44xx.h"
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static int omap4_clkdm_add_wkup_sleep_dep(struct clockdomain *clkdm1,
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struct clockdomain *clkdm2)
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{
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omap4_cminst_set_inst_reg_bits((1 << clkdm2->dep_bit),
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clkdm1->prcm_partition,
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clkdm1->cm_inst, clkdm1->clkdm_offs +
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OMAP4_CM_STATICDEP);
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return 0;
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}
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static int omap4_clkdm_del_wkup_sleep_dep(struct clockdomain *clkdm1,
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struct clockdomain *clkdm2)
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{
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omap4_cminst_clear_inst_reg_bits((1 << clkdm2->dep_bit),
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clkdm1->prcm_partition,
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clkdm1->cm_inst, clkdm1->clkdm_offs +
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OMAP4_CM_STATICDEP);
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return 0;
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}
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static int omap4_clkdm_read_wkup_sleep_dep(struct clockdomain *clkdm1,
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struct clockdomain *clkdm2)
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{
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return omap4_cminst_read_inst_reg_bits(clkdm1->prcm_partition,
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clkdm1->cm_inst, clkdm1->clkdm_offs +
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OMAP4_CM_STATICDEP,
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(1 << clkdm2->dep_bit));
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}
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static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
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{
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struct clkdm_dep *cd;
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u32 mask = 0;
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if (!clkdm->prcm_partition)
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return 0;
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for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
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if (!cd->clkdm)
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continue; /* only happens if data is erroneous */
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mask |= 1 << cd->clkdm->dep_bit;
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atomic_set(&cd->wkdep_usecount, 0);
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}
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omap4_cminst_clear_inst_reg_bits(mask, clkdm->prcm_partition,
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clkdm->cm_inst, clkdm->clkdm_offs +
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OMAP4_CM_STATICDEP);
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return 0;
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}
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static int omap4_clkdm_sleep(struct clockdomain *clkdm)
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{
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omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst, clkdm->clkdm_offs);
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return 0;
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}
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static int omap4_clkdm_wakeup(struct clockdomain *clkdm)
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{
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omap4_cminst_clkdm_force_wakeup(clkdm->prcm_partition,
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clkdm->cm_inst, clkdm->clkdm_offs);
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return 0;
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}
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static void omap4_clkdm_allow_idle(struct clockdomain *clkdm)
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{
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omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst, clkdm->clkdm_offs);
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}
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static void omap4_clkdm_deny_idle(struct clockdomain *clkdm)
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{
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if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
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omap4_clkdm_wakeup(clkdm);
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else
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omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst,
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clkdm->clkdm_offs);
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}
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static int omap4_clkdm_clk_enable(struct clockdomain *clkdm)
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{
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if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
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return omap4_clkdm_wakeup(clkdm);
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return 0;
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}
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static int omap4_clkdm_clk_disable(struct clockdomain *clkdm)
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{
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bool hwsup = false;
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if (!clkdm->prcm_partition)
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return 0;
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hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst, clkdm->clkdm_offs);
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if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
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omap4_clkdm_sleep(clkdm);
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return 0;
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}
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struct clkdm_ops omap4_clkdm_operations = {
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.clkdm_add_wkdep = omap4_clkdm_add_wkup_sleep_dep,
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.clkdm_del_wkdep = omap4_clkdm_del_wkup_sleep_dep,
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.clkdm_read_wkdep = omap4_clkdm_read_wkup_sleep_dep,
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.clkdm_clear_all_wkdeps = omap4_clkdm_clear_all_wkup_sleep_deps,
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.clkdm_add_sleepdep = omap4_clkdm_add_wkup_sleep_dep,
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.clkdm_del_sleepdep = omap4_clkdm_del_wkup_sleep_dep,
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.clkdm_read_sleepdep = omap4_clkdm_read_wkup_sleep_dep,
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.clkdm_clear_all_sleepdeps = omap4_clkdm_clear_all_wkup_sleep_deps,
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.clkdm_sleep = omap4_clkdm_sleep,
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.clkdm_wakeup = omap4_clkdm_wakeup,
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.clkdm_allow_idle = omap4_clkdm_allow_idle,
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.clkdm_deny_idle = omap4_clkdm_deny_idle,
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.clkdm_clk_enable = omap4_clkdm_clk_enable,
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.clkdm_clk_disable = omap4_clkdm_clk_disable,
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};
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