271 lines
7 KiB
C
271 lines
7 KiB
C
/* $Id: fault.c,v 1.5 2000/01/26 16:20:29 jsm Exp $
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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*
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* Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
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* Copyright 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
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* Copyright 1999 Hewlett Packard Co.
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*
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*/
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#include <linux/mm.h>
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#include <linux/ptrace.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <asm/uaccess.h>
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#include <asm/traps.h>
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#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
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/* dumped to the console via printk) */
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/* Defines for parisc_acctyp() */
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#define READ 0
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#define WRITE 1
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/* Various important other fields */
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#define bit22set(x) (x & 0x00000200)
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#define bits23_25set(x) (x & 0x000001c0)
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#define isGraphicsFlushRead(x) ((x & 0xfc003fdf) == 0x04001a80)
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/* extended opcode is 0x6a */
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#define BITSSET 0x1c0 /* for identifying LDCW */
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DEFINE_PER_CPU(struct exception_data, exception_data);
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/*
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* parisc_acctyp(unsigned int inst) --
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* Given a PA-RISC memory access instruction, determine if the
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* the instruction would perform a memory read or memory write
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* operation.
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*
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* This function assumes that the given instruction is a memory access
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* instruction (i.e. you should really only call it if you know that
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* the instruction has generated some sort of a memory access fault).
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*
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* Returns:
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* VM_READ if read operation
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* VM_WRITE if write operation
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* VM_EXEC if execute operation
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*/
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static unsigned long
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parisc_acctyp(unsigned long code, unsigned int inst)
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{
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if (code == 6 || code == 16)
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return VM_EXEC;
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switch (inst & 0xf0000000) {
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case 0x40000000: /* load */
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case 0x50000000: /* new load */
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return VM_READ;
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case 0x60000000: /* store */
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case 0x70000000: /* new store */
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return VM_WRITE;
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case 0x20000000: /* coproc */
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case 0x30000000: /* coproc2 */
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if (bit22set(inst))
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return VM_WRITE;
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case 0x0: /* indexed/memory management */
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if (bit22set(inst)) {
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/*
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* Check for the 'Graphics Flush Read' instruction.
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* It resembles an FDC instruction, except for bits
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* 20 and 21. Any combination other than zero will
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* utilize the block mover functionality on some
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* older PA-RISC platforms. The case where a block
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* move is performed from VM to graphics IO space
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* should be treated as a READ.
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*
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* The significance of bits 20,21 in the FDC
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* instruction is:
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*
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* 00 Flush data cache (normal instruction behavior)
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* 01 Graphics flush write (IO space -> VM)
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* 10 Graphics flush read (VM -> IO space)
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* 11 Graphics flush read/write (VM <-> IO space)
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*/
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if (isGraphicsFlushRead(inst))
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return VM_READ;
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return VM_WRITE;
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} else {
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/*
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* Check for LDCWX and LDCWS (semaphore instructions).
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* If bits 23 through 25 are all 1's it is one of
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* the above two instructions and is a write.
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*
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* Note: With the limited bits we are looking at,
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* this will also catch PROBEW and PROBEWI. However,
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* these should never get in here because they don't
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* generate exceptions of the type:
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* Data TLB miss fault/data page fault
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* Data memory protection trap
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*/
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if (bits23_25set(inst) == BITSSET)
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return VM_WRITE;
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}
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return VM_READ; /* Default */
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}
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return VM_READ; /* Default */
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}
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#undef bit22set
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#undef bits23_25set
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#undef isGraphicsFlushRead
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#undef BITSSET
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#if 0
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/* This is the treewalk to find a vma which is the highest that has
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* a start < addr. We're using find_vma_prev instead right now, but
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* we might want to use this at some point in the future. Probably
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* not, but I want it committed to CVS so I don't lose it :-)
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*/
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while (tree != vm_avl_empty) {
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if (tree->vm_start > addr) {
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tree = tree->vm_avl_left;
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} else {
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prev = tree;
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if (prev->vm_next == NULL)
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break;
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if (prev->vm_next->vm_start > addr)
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break;
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tree = tree->vm_avl_right;
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}
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}
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#endif
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void do_page_fault(struct pt_regs *regs, unsigned long code,
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unsigned long address)
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{
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struct vm_area_struct *vma, *prev_vma;
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struct task_struct *tsk = current;
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struct mm_struct *mm = tsk->mm;
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const struct exception_table_entry *fix;
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unsigned long acc_type;
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if (in_interrupt() || !mm)
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goto no_context;
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down_read(&mm->mmap_sem);
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vma = find_vma_prev(mm, address, &prev_vma);
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if (!vma || address < vma->vm_start)
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goto check_expansion;
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/*
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* Ok, we have a good vm_area for this memory access. We still need to
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* check the access permissions.
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*/
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good_area:
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acc_type = parisc_acctyp(code,regs->iir);
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if ((vma->vm_flags & acc_type) != acc_type)
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goto bad_area;
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/*
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* If for any reason at all we couldn't handle the fault, make
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* sure we exit gracefully rather than endlessly redo the
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* fault.
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*/
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switch (handle_mm_fault(mm, vma, address, (acc_type & VM_WRITE) != 0)) {
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case VM_FAULT_MINOR:
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++current->min_flt;
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break;
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case VM_FAULT_MAJOR:
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++current->maj_flt;
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break;
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case VM_FAULT_SIGBUS:
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/*
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* We hit a hared mapping outside of the file, or some
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* other thing happened to us that made us unable to
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* handle the page fault gracefully.
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*/
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goto bad_area;
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default:
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goto out_of_memory;
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}
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up_read(&mm->mmap_sem);
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return;
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check_expansion:
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vma = prev_vma;
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if (vma && (expand_stack(vma, address) == 0))
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goto good_area;
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/*
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* Something tried to access memory that isn't in our memory map..
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*/
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bad_area:
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up_read(&mm->mmap_sem);
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if (user_mode(regs)) {
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struct siginfo si;
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#ifdef PRINT_USER_FAULTS
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printk(KERN_DEBUG "\n");
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printk(KERN_DEBUG "do_page_fault() pid=%d command='%s' type=%lu address=0x%08lx\n",
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tsk->pid, tsk->comm, code, address);
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if (vma) {
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printk(KERN_DEBUG "vm_start = 0x%08lx, vm_end = 0x%08lx\n",
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vma->vm_start, vma->vm_end);
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}
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show_regs(regs);
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#endif
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/* FIXME: actually we need to get the signo and code correct */
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si.si_signo = SIGSEGV;
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si.si_errno = 0;
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si.si_code = SEGV_MAPERR;
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si.si_addr = (void __user *) address;
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force_sig_info(SIGSEGV, &si, current);
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return;
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}
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no_context:
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if (!user_mode(regs)) {
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fix = search_exception_tables(regs->iaoq[0]);
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if (fix) {
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struct exception_data *d;
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d = &__get_cpu_var(exception_data);
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d->fault_ip = regs->iaoq[0];
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d->fault_space = regs->isr;
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d->fault_addr = regs->ior;
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regs->iaoq[0] = ((fix->fixup) & ~3);
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/*
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* NOTE: In some cases the faulting instruction
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* may be in the delay slot of a branch. We
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* don't want to take the branch, so we don't
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* increment iaoq[1], instead we set it to be
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* iaoq[0]+4, and clear the B bit in the PSW
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*/
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regs->iaoq[1] = regs->iaoq[0] + 4;
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regs->gr[0] &= ~PSW_B; /* IPSW in gr[0] */
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return;
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}
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}
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parisc_terminate("Bad Address (null pointer deref?)", regs, code, address);
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out_of_memory:
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up_read(&mm->mmap_sem);
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printk(KERN_CRIT "VM: killing process %s\n", current->comm);
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if (user_mode(regs))
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do_exit(SIGKILL);
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goto no_context;
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}
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