13b54a5052
Keep track of processes being debugged (including the kernel itself) and turn the OCD system on and off as appropriate. Since enabling debugging turns off some optimizations in the CPU core, this fixes the issue that enabling KProbes support or simply running a program under gdbserver will reduce system performance significantly until the next reboot. The CPU performance will still be reduced for all processes while a process is being debugged, but this is a lot better than reducing the performance forever. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
157 lines
3.4 KiB
C
157 lines
3.4 KiB
C
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_AVR32_PTRACE_H
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#define __ASM_AVR32_PTRACE_H
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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/*
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* Status Register bits
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*/
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#define SR_H 0x20000000
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#define SR_J 0x10000000
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#define SR_DM 0x08000000
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#define SR_D 0x04000000
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#define MODE_NMI 0x01c00000
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#define MODE_EXCEPTION 0x01800000
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#define MODE_INT3 0x01400000
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#define MODE_INT2 0x01000000
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#define MODE_INT1 0x00c00000
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#define MODE_INT0 0x00800000
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#define MODE_SUPERVISOR 0x00400000
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#define MODE_USER 0x00000000
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#define MODE_MASK 0x01c00000
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#define SR_EM 0x00200000
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#define SR_I3M 0x00100000
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#define SR_I2M 0x00080000
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#define SR_I1M 0x00040000
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#define SR_I0M 0x00020000
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#define SR_GM 0x00010000
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#define SR_H_BIT 29
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#define SR_J_BIT 28
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#define SR_DM_BIT 27
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#define SR_D_BIT 26
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#define MODE_SHIFT 22
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#define SR_EM_BIT 21
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#define SR_I3M_BIT 20
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#define SR_I2M_BIT 19
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#define SR_I1M_BIT 18
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#define SR_I0M_BIT 17
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#define SR_GM_BIT 16
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/* The user-visible part */
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#define SR_L 0x00000020
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#define SR_Q 0x00000010
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#define SR_V 0x00000008
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#define SR_N 0x00000004
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#define SR_Z 0x00000002
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#define SR_C 0x00000001
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#define SR_L_BIT 5
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#define SR_Q_BIT 4
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#define SR_V_BIT 3
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#define SR_N_BIT 2
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#define SR_Z_BIT 1
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#define SR_C_BIT 0
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/*
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* The order is defined by the stmts instruction. r0 is stored first,
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* so it gets the highest address.
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*
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* Registers 0-12 are general-purpose registers (r12 is normally used for
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* the function return value).
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* Register 13 is the stack pointer
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* Register 14 is the link register
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* Register 15 is the program counter (retrieved from the RAR sysreg)
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*/
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#define FRAME_SIZE_FULL 72
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#define REG_R12_ORIG 68
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#define REG_R0 64
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#define REG_R1 60
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#define REG_R2 56
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#define REG_R3 52
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#define REG_R4 48
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#define REG_R5 44
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#define REG_R6 40
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#define REG_R7 36
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#define REG_R8 32
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#define REG_R9 28
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#define REG_R10 24
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#define REG_R11 20
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#define REG_R12 16
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#define REG_SP 12
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#define REG_LR 8
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#define FRAME_SIZE_MIN 8
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#define REG_PC 4
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#define REG_SR 0
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#ifndef __ASSEMBLY__
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struct pt_regs {
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/* These are always saved */
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unsigned long sr;
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unsigned long pc;
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/* These are sometimes saved */
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unsigned long lr;
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unsigned long sp;
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unsigned long r12;
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unsigned long r11;
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unsigned long r10;
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unsigned long r9;
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unsigned long r8;
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unsigned long r7;
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unsigned long r6;
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unsigned long r5;
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unsigned long r4;
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unsigned long r3;
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unsigned long r2;
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unsigned long r1;
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unsigned long r0;
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/* Only saved on system call */
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unsigned long r12_orig;
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};
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#ifdef __KERNEL__
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#include <asm/ocd.h>
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#define arch_ptrace_attach(child) ocd_enable(child)
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#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER)
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#define instruction_pointer(regs) ((regs)->pc)
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#define profile_pc(regs) instruction_pointer(regs)
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extern void show_regs (struct pt_regs *);
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static __inline__ int valid_user_regs(struct pt_regs *regs)
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{
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/*
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* Some of the Java bits might be acceptable if/when we
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* implement some support for that stuff...
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*/
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if ((regs->sr & 0xffff0000) == 0)
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return 1;
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/*
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* Force status register flags to be sane and report this
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* illegal behaviour...
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*/
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regs->sr &= 0x0000ffff;
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return 0;
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}
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#endif /* __KERNEL__ */
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#endif /* ! __ASSEMBLY__ */
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#endif /* __ASM_AVR32_PTRACE_H */
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