fced80c735
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
220 lines
5.2 KiB
C
220 lines
5.2 KiB
C
/*
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* linux/arch/arm/mach-imx/time.c
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*
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* Copyright (C) 2000-2001 Deep Blue Solutions
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* Copyright (C) 2002 Shane Nay (shane@minirl.com)
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* Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/time.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/leds.h>
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#include <asm/irq.h>
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#include <asm/mach/time.h>
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/* Use timer 1 as system timer */
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#define TIMER_BASE IMX_TIM1_BASE
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static struct clock_event_device clockevent_imx;
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static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t
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imx_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = &clockevent_imx;
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uint32_t tstat;
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irqreturn_t ret = IRQ_NONE;
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/* clear the interrupt */
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tstat = IMX_TSTAT(TIMER_BASE);
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IMX_TSTAT(TIMER_BASE) = 0;
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if (tstat & TSTAT_COMP) {
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evt->event_handler(evt);
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ret = IRQ_HANDLED;
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}
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return ret;
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}
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static struct irqaction imx_timer_irq = {
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.name = "i.MX Timer Tick",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = imx_timer_interrupt,
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};
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/*
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* Set up timer hardware into expected mode and state.
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*/
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static void __init imx_timer_hardware_init(void)
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{
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/*
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* Initialise to a known state (all timers off, and timing reset)
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*/
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IMX_TCTL(TIMER_BASE) = 0;
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IMX_TPRER(TIMER_BASE) = 0;
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IMX_TCTL(TIMER_BASE) = TCTL_FRR | TCTL_CLK_PCLK1 | TCTL_TEN;
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}
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cycle_t imx_get_cycles(void)
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{
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return IMX_TCN(TIMER_BASE);
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}
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static struct clocksource clocksource_imx = {
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.name = "imx_timer1",
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.rating = 200,
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.read = imx_get_cycles,
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.mask = 0xFFFFFFFF,
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.shift = 20,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int __init imx_clocksource_init(unsigned long rate)
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{
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clocksource_imx.mult =
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clocksource_hz2mult(rate, clocksource_imx.shift);
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clocksource_register(&clocksource_imx);
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return 0;
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}
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static int imx_set_next_event(unsigned long evt,
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struct clock_event_device *unused)
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{
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unsigned long tcmp;
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tcmp = IMX_TCN(TIMER_BASE) + evt;
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IMX_TCMP(TIMER_BASE) = tcmp;
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return (int32_t)(tcmp - IMX_TCN(TIMER_BASE)) < 0 ? -ETIME : 0;
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}
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#ifdef DEBUG
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static const char *clock_event_mode_label[]={
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[CLOCK_EVT_MODE_PERIODIC] = "CLOCK_EVT_MODE_PERIODIC",
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[CLOCK_EVT_MODE_ONESHOT] = "CLOCK_EVT_MODE_ONESHOT",
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[CLOCK_EVT_MODE_SHUTDOWN] = "CLOCK_EVT_MODE_SHUTDOWN",
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[CLOCK_EVT_MODE_UNUSED] = "CLOCK_EVT_MODE_UNUSED"
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};
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#endif /*DEBUG*/
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static void imx_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
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{
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unsigned long flags;
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/*
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* The timer interrupt generation is disabled at least
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* for enough time to call imx_set_next_event()
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*/
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local_irq_save(flags);
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/* Disable interrupt in GPT module */
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IMX_TCTL(TIMER_BASE) &= ~TCTL_IRQEN;
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if (mode != clockevent_mode) {
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/* Set event time into far-far future */
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IMX_TCMP(TIMER_BASE) = IMX_TCN(TIMER_BASE) - 3;
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/* Clear pending interrupt */
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IMX_TSTAT(TIMER_BASE) &= ~TSTAT_COMP;
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}
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#ifdef DEBUG
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printk(KERN_INFO "imx_set_mode: changing mode from %s to %s\n",
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clock_event_mode_label[clockevent_mode], clock_event_mode_label[mode]);
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#endif /*DEBUG*/
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/* Remember timer mode */
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clockevent_mode = mode;
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local_irq_restore(flags);
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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printk(KERN_ERR "imx_set_mode: Periodic mode is not supported for i.MX\n");
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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/*
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* Do not put overhead of interrupt enable/disable into
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* imx_set_next_event(), the core has about 4 minutes
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* to call imx_set_next_event() or shutdown clock after
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* mode switching
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*/
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local_irq_save(flags);
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IMX_TCTL(TIMER_BASE) |= TCTL_IRQEN;
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local_irq_restore(flags);
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break;
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_RESUME:
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/* Left event sources disabled, no more interrupts appears */
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break;
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}
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}
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static struct clock_event_device clockevent_imx = {
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.name = "imx_timer1",
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.set_mode = imx_set_mode,
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.set_next_event = imx_set_next_event,
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.rating = 200,
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};
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static int __init imx_clockevent_init(unsigned long rate)
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{
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clockevent_imx.mult = div_sc(rate, NSEC_PER_SEC,
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clockevent_imx.shift);
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clockevent_imx.max_delta_ns =
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clockevent_delta2ns(0xfffffffe, &clockevent_imx);
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clockevent_imx.min_delta_ns =
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clockevent_delta2ns(0xf, &clockevent_imx);
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clockevent_imx.cpumask = cpumask_of_cpu(0);
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clockevents_register_device(&clockevent_imx);
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return 0;
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}
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extern int imx_clocks_init(void);
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static void __init imx_timer_init(void)
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{
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struct clk *clk;
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unsigned long rate;
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imx_clocks_init();
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clk = clk_get(NULL, "perclk1");
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clk_enable(clk);
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rate = clk_get_rate(clk);
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imx_timer_hardware_init();
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imx_clocksource_init(rate);
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imx_clockevent_init(rate);
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/*
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* Make irqs happen for the system timer
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*/
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setup_irq(TIM1_INT, &imx_timer_irq);
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}
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struct sys_timer imx_timer = {
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.init = imx_timer_init,
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};
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