ccaf5f05b2
There is not enough users to warrant its existence, and it is actually an obstacle to progress with the new DMA API which cannot cover this case properly. To keep backward compatibility, let's perform the necessary custom cache maintenance locally in the only driver affected. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
51 lines
1.2 KiB
C
51 lines
1.2 KiB
C
/*
|
|
* linux/arch/arm/mm/proc-syms.c
|
|
*
|
|
* Copyright (C) 2000-2002 Russell King
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#include <linux/module.h>
|
|
#include <linux/mm.h>
|
|
|
|
#include <asm/cacheflush.h>
|
|
#include <asm/proc-fns.h>
|
|
#include <asm/tlbflush.h>
|
|
#include <asm/page.h>
|
|
|
|
#ifndef MULTI_CPU
|
|
EXPORT_SYMBOL(cpu_dcache_clean_area);
|
|
EXPORT_SYMBOL(cpu_set_pte_ext);
|
|
#else
|
|
EXPORT_SYMBOL(processor);
|
|
#endif
|
|
|
|
#ifndef MULTI_CACHE
|
|
EXPORT_SYMBOL(__cpuc_flush_kern_all);
|
|
EXPORT_SYMBOL(__cpuc_flush_user_all);
|
|
EXPORT_SYMBOL(__cpuc_flush_user_range);
|
|
EXPORT_SYMBOL(__cpuc_coherent_kern_range);
|
|
EXPORT_SYMBOL(__cpuc_flush_dcache_page);
|
|
#else
|
|
EXPORT_SYMBOL(cpu_cache);
|
|
#endif
|
|
|
|
#ifdef CONFIG_MMU
|
|
#ifndef MULTI_USER
|
|
EXPORT_SYMBOL(__cpu_clear_user_highpage);
|
|
EXPORT_SYMBOL(__cpu_copy_user_highpage);
|
|
#else
|
|
EXPORT_SYMBOL(cpu_user);
|
|
#endif
|
|
#endif
|
|
|
|
/*
|
|
* No module should need to touch the TLB (and currently
|
|
* no modules do. We export this for "loadkernel" support
|
|
* (booting a new kernel from within a running kernel.)
|
|
*/
|
|
#ifdef MULTI_TLB
|
|
EXPORT_SYMBOL(cpu_tlb);
|
|
#endif
|