5f34fe1cfc
* 'core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (63 commits) stacktrace: provide save_stack_trace_tsk() weak alias rcu: provide RCU options on non-preempt architectures too printk: fix discarding message when recursion_bug futex: clean up futex_(un)lock_pi fault handling "Tree RCU": scalable classic RCU implementation futex: rename field in futex_q to clarify single waiter semantics x86/swiotlb: add default swiotlb_arch_range_needs_mapping x86/swiotlb: add default phys<->bus conversion x86: unify pci iommu setup and allow swiotlb to compile for 32 bit x86: add swiotlb allocation functions swiotlb: consolidate swiotlb info message printing swiotlb: support bouncing of HighMem pages swiotlb: factor out copy to/from device swiotlb: add arch hook to force mapping swiotlb: allow architectures to override phys<->bus<->phys conversions swiotlb: add comment where we handle the overflow of a dma mask on 32 bit rcu: fix rcutorture behavior during reboot resources: skip sanity check of busy resources swiotlb: move some definitions to header swiotlb: allow architectures to override swiotlb pool allocation ... Fix up trivial conflicts in arch/x86/kernel/Makefile arch/x86/mm/init_32.c include/linux/hardirq.h as per Ingo's suggestions.
306 lines
8.4 KiB
C
306 lines
8.4 KiB
C
#ifndef _ASM_X86_DMA_MAPPING_H
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#define _ASM_X86_DMA_MAPPING_H
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/*
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* IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
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* documentation.
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*/
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#include <linux/scatterlist.h>
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#include <asm/io.h>
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#include <asm/swiotlb.h>
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#include <asm-generic/dma-coherent.h>
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extern dma_addr_t bad_dma_address;
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extern int iommu_merge;
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extern struct device x86_dma_fallback_dev;
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extern int panic_on_overflow;
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struct dma_mapping_ops {
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int (*mapping_error)(struct device *dev,
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dma_addr_t dma_addr);
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void* (*alloc_coherent)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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void (*free_coherent)(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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dma_addr_t (*map_single)(struct device *hwdev, phys_addr_t ptr,
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size_t size, int direction);
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void (*unmap_single)(struct device *dev, dma_addr_t addr,
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size_t size, int direction);
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void (*sync_single_for_cpu)(struct device *hwdev,
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dma_addr_t dma_handle, size_t size,
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int direction);
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void (*sync_single_for_device)(struct device *hwdev,
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dma_addr_t dma_handle, size_t size,
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int direction);
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void (*sync_single_range_for_cpu)(struct device *hwdev,
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dma_addr_t dma_handle, unsigned long offset,
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size_t size, int direction);
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void (*sync_single_range_for_device)(struct device *hwdev,
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dma_addr_t dma_handle, unsigned long offset,
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size_t size, int direction);
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void (*sync_sg_for_cpu)(struct device *hwdev,
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struct scatterlist *sg, int nelems,
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int direction);
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void (*sync_sg_for_device)(struct device *hwdev,
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struct scatterlist *sg, int nelems,
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int direction);
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int (*map_sg)(struct device *hwdev, struct scatterlist *sg,
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int nents, int direction);
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void (*unmap_sg)(struct device *hwdev,
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struct scatterlist *sg, int nents,
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int direction);
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int (*dma_supported)(struct device *hwdev, u64 mask);
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int is_phys;
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};
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extern struct dma_mapping_ops *dma_ops;
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static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
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{
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#ifdef CONFIG_X86_32
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return dma_ops;
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#else
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if (unlikely(!dev) || !dev->archdata.dma_ops)
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return dma_ops;
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else
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return dev->archdata.dma_ops;
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#endif
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}
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/* Make sure we keep the same behaviour */
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static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
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{
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struct dma_mapping_ops *ops = get_dma_ops(dev);
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if (ops->mapping_error)
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return ops->mapping_error(dev, dma_addr);
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return (dma_addr == bad_dma_address);
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}
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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#define dma_is_consistent(d, h) (1)
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extern int dma_supported(struct device *hwdev, u64 mask);
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extern int dma_set_mask(struct device *dev, u64 mask);
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extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_addr, gfp_t flag);
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static inline dma_addr_t
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dma_map_single(struct device *hwdev, void *ptr, size_t size,
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int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
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}
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static inline void
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dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
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int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(direction));
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if (ops->unmap_single)
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ops->unmap_single(dev, addr, size, direction);
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}
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static inline int
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dma_map_sg(struct device *hwdev, struct scatterlist *sg,
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int nents, int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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return ops->map_sg(hwdev, sg, nents, direction);
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}
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static inline void
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dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
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int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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if (ops->unmap_sg)
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ops->unmap_sg(hwdev, sg, nents, direction);
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}
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static inline void
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dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
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size_t size, int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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if (ops->sync_single_for_cpu)
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ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
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flush_write_buffers();
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}
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static inline void
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dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
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size_t size, int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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if (ops->sync_single_for_device)
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ops->sync_single_for_device(hwdev, dma_handle, size, direction);
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flush_write_buffers();
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}
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static inline void
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dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
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unsigned long offset, size_t size, int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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if (ops->sync_single_range_for_cpu)
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ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
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size, direction);
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flush_write_buffers();
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}
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static inline void
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dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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if (ops->sync_single_range_for_device)
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ops->sync_single_range_for_device(hwdev, dma_handle,
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offset, size, direction);
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flush_write_buffers();
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}
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static inline void
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dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
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int nelems, int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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if (ops->sync_sg_for_cpu)
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ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
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flush_write_buffers();
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}
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static inline void
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dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
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int nelems, int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(hwdev);
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BUG_ON(!valid_dma_direction(direction));
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if (ops->sync_sg_for_device)
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ops->sync_sg_for_device(hwdev, sg, nelems, direction);
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flush_write_buffers();
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}
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static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
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size_t offset, size_t size,
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int direction)
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{
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struct dma_mapping_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(direction));
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return ops->map_single(dev, page_to_phys(page) + offset,
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size, direction);
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}
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static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
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size_t size, int direction)
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{
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dma_unmap_single(dev, addr, size, direction);
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}
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir)
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{
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flush_write_buffers();
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}
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static inline int dma_get_cache_alignment(void)
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{
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/* no easy way to get cache size on all x86, so return the
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* maximum possible, to be safe */
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return boot_cpu_data.x86_clflush_size;
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}
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static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
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gfp_t gfp)
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{
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unsigned long dma_mask = 0;
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dma_mask = dev->coherent_dma_mask;
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if (!dma_mask)
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dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
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return dma_mask;
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}
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static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
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{
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unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
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if (dma_mask <= DMA_24BIT_MASK)
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gfp |= GFP_DMA;
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#ifdef CONFIG_X86_64
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if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
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gfp |= GFP_DMA32;
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#endif
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return gfp;
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}
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static inline void *
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dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t gfp)
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{
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struct dma_mapping_ops *ops = get_dma_ops(dev);
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void *memory;
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gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);
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if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
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return memory;
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if (!dev) {
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dev = &x86_dma_fallback_dev;
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gfp |= GFP_DMA;
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}
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if (!is_device_dma_capable(dev))
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return NULL;
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if (!ops->alloc_coherent)
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return NULL;
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return ops->alloc_coherent(dev, size, dma_handle,
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dma_alloc_coherent_gfp_flags(dev, gfp));
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}
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static inline void dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t bus)
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{
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struct dma_mapping_ops *ops = get_dma_ops(dev);
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WARN_ON(irqs_disabled()); /* for portability */
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if (dma_release_from_coherent(dev, get_order(size), vaddr))
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return;
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if (ops->free_coherent)
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ops->free_coherent(dev, size, vaddr, bus);
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}
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#endif
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