4d8dd66c16
This adds TX/RX frame dumping capabilities through debugfs. The intention is that with this approach debugging of rt2x00 is simplified since _all_ frames going in and out of the device are send to debugfs as well along with additional information like the hardware descriptor. Based on the patch by Mattias Nissler. Mattias also has some tools that will make the dumped frames available to wireshark: http://www-user.rhrk.uni-kl.de/~nissler/rt2x00/ Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
540 lines
12 KiB
C
540 lines
12 KiB
C
/*
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Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
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<http://rt2x00.serialmonkey.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the
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Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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Module: rt2x00pci
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Abstract: rt2x00 generic pci device routines.
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*/
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#include <linux/dma-mapping.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include "rt2x00.h"
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#include "rt2x00pci.h"
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/*
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* Beacon handlers.
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*/
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int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
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struct ieee80211_tx_control *control)
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{
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struct rt2x00_dev *rt2x00dev = hw->priv;
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struct skb_desc *desc;
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struct data_ring *ring;
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struct data_entry *entry;
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/*
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* Just in case mac80211 doesn't set this correctly,
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* but we need this queue set for the descriptor
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* initialization.
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*/
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control->queue = IEEE80211_TX_QUEUE_BEACON;
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ring = rt2x00lib_get_ring(rt2x00dev, control->queue);
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entry = rt2x00_get_data_entry(ring);
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/*
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* Fill in skb descriptor
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*/
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desc = get_skb_desc(skb);
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desc->desc_len = ring->desc_size;
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desc->data_len = skb->len;
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desc->desc = entry->priv;
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desc->data = skb->data;
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desc->ring = ring;
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desc->entry = entry;
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memcpy(entry->data_addr, skb->data, skb->len);
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rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
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/*
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* Enable beacon generation.
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*/
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rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue);
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return 0;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_beacon_update);
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/*
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* TX data handlers.
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*/
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int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev,
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struct data_ring *ring, struct sk_buff *skb,
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struct ieee80211_tx_control *control)
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{
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struct data_entry *entry = rt2x00_get_data_entry(ring);
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__le32 *txd = entry->priv;
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struct skb_desc *desc;
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u32 word;
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if (rt2x00_ring_full(ring)) {
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ieee80211_stop_queue(rt2x00dev->hw, control->queue);
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return -EINVAL;
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}
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rt2x00_desc_read(txd, 0, &word);
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if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) ||
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rt2x00_get_field32(word, TXD_ENTRY_VALID)) {
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ERROR(rt2x00dev,
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"Arrived at non-free entry in the non-full queue %d.\n"
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"Please file bug report to %s.\n",
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control->queue, DRV_PROJECT);
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ieee80211_stop_queue(rt2x00dev->hw, control->queue);
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return -EINVAL;
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}
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/*
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* Fill in skb descriptor
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*/
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desc = get_skb_desc(skb);
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desc->desc_len = ring->desc_size;
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desc->data_len = skb->len;
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desc->desc = entry->priv;
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desc->data = skb->data;
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desc->ring = ring;
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desc->entry = entry;
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memcpy(entry->data_addr, skb->data, skb->len);
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rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
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rt2x00_ring_index_inc(ring);
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if (rt2x00_ring_full(ring))
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ieee80211_stop_queue(rt2x00dev->hw, control->queue);
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return 0;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data);
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/*
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* TX/RX data handlers.
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*/
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void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
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{
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struct data_ring *ring = rt2x00dev->rx;
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struct data_entry *entry;
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struct sk_buff *skb;
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struct ieee80211_hdr *hdr;
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struct skb_desc *skbdesc;
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struct rxdata_entry_desc desc;
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int header_size;
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__le32 *rxd;
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int align;
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u32 word;
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while (1) {
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entry = rt2x00_get_data_entry(ring);
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rxd = entry->priv;
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rt2x00_desc_read(rxd, 0, &word);
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if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC))
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break;
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memset(&desc, 0, sizeof(desc));
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rt2x00dev->ops->lib->fill_rxdone(entry, &desc);
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hdr = (struct ieee80211_hdr *)entry->data_addr;
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header_size =
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ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control));
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/*
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* The data behind the ieee80211 header must be
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* aligned on a 4 byte boundary.
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*/
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align = header_size % 4;
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/*
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* Allocate the sk_buffer, initialize it and copy
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* all data into it.
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*/
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skb = dev_alloc_skb(desc.size + align);
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if (!skb)
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return;
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skb_reserve(skb, align);
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memcpy(skb_put(skb, desc.size), entry->data_addr, desc.size);
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/*
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* Fill in skb descriptor
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*/
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skbdesc = get_skb_desc(skb);
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skbdesc->desc_len = entry->ring->desc_size;
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skbdesc->data_len = skb->len;
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skbdesc->desc = entry->priv;
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skbdesc->data = skb->data;
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skbdesc->ring = ring;
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skbdesc->entry = entry;
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/*
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* Send the frame to rt2x00lib for further processing.
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*/
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rt2x00lib_rxdone(entry, skb, &desc);
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if (test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) {
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rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1);
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rt2x00_desc_write(rxd, 0, word);
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}
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rt2x00_ring_index_inc(ring);
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}
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
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void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct data_entry *entry,
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const int tx_status, const int retry)
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{
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u32 word;
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rt2x00lib_txdone(entry, tx_status, retry);
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/*
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* Make this entry available for reuse.
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*/
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entry->flags = 0;
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rt2x00_desc_read(entry->priv, 0, &word);
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rt2x00_set_field32(&word, TXD_ENTRY_OWNER_NIC, 0);
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rt2x00_set_field32(&word, TXD_ENTRY_VALID, 0);
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rt2x00_desc_write(entry->priv, 0, word);
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rt2x00_ring_index_done_inc(entry->ring);
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/*
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* If the data ring was full before the txdone handler
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* we must make sure the packet queue in the mac80211 stack
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* is reenabled when the txdone handler has finished.
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*/
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if (!rt2x00_ring_full(entry->ring))
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ieee80211_wake_queue(rt2x00dev->hw,
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entry->tx_status.control.queue);
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_txdone);
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/*
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* Device initialization handlers.
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*/
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#define priv_offset(__ring, __i) \
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({ \
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ring->data_addr + (i * ring->desc_size); \
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})
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#define data_addr_offset(__ring, __i) \
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({ \
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(__ring)->data_addr + \
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((__ring)->stats.limit * (__ring)->desc_size) + \
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((__i) * (__ring)->data_size); \
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})
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#define data_dma_offset(__ring, __i) \
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({ \
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(__ring)->data_dma + \
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((__ring)->stats.limit * (__ring)->desc_size) + \
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((__i) * (__ring)->data_size); \
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})
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static int rt2x00pci_alloc_dma(struct rt2x00_dev *rt2x00dev,
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struct data_ring *ring)
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{
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unsigned int i;
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/*
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* Allocate DMA memory for descriptor and buffer.
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*/
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ring->data_addr = pci_alloc_consistent(rt2x00dev_pci(rt2x00dev),
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rt2x00_get_ring_size(ring),
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&ring->data_dma);
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if (!ring->data_addr)
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return -ENOMEM;
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/*
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* Initialize all ring entries to contain valid
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* addresses.
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*/
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for (i = 0; i < ring->stats.limit; i++) {
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ring->entry[i].priv = priv_offset(ring, i);
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ring->entry[i].data_addr = data_addr_offset(ring, i);
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ring->entry[i].data_dma = data_dma_offset(ring, i);
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}
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return 0;
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}
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static void rt2x00pci_free_dma(struct rt2x00_dev *rt2x00dev,
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struct data_ring *ring)
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{
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if (ring->data_addr)
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pci_free_consistent(rt2x00dev_pci(rt2x00dev),
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rt2x00_get_ring_size(ring),
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ring->data_addr, ring->data_dma);
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ring->data_addr = NULL;
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}
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int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
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{
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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struct data_ring *ring;
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int status;
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/*
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* Allocate DMA
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*/
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ring_for_each(rt2x00dev, ring) {
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status = rt2x00pci_alloc_dma(rt2x00dev, ring);
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if (status)
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goto exit;
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}
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/*
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* Register interrupt handler.
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*/
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status = request_irq(pci_dev->irq, rt2x00dev->ops->lib->irq_handler,
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IRQF_SHARED, pci_name(pci_dev), rt2x00dev);
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if (status) {
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ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
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pci_dev->irq, status);
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return status;
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}
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return 0;
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exit:
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rt2x00pci_uninitialize(rt2x00dev);
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return status;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
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void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
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{
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struct data_ring *ring;
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/*
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* Free irq line.
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*/
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free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev);
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/*
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* Free DMA
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*/
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ring_for_each(rt2x00dev, ring)
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rt2x00pci_free_dma(rt2x00dev, ring);
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
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/*
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* PCI driver handlers.
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*/
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static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
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{
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kfree(rt2x00dev->rf);
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rt2x00dev->rf = NULL;
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kfree(rt2x00dev->eeprom);
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rt2x00dev->eeprom = NULL;
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if (rt2x00dev->csr_addr) {
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iounmap(rt2x00dev->csr_addr);
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rt2x00dev->csr_addr = NULL;
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}
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}
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static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
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{
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struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev);
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rt2x00dev->csr_addr = ioremap(pci_resource_start(pci_dev, 0),
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pci_resource_len(pci_dev, 0));
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if (!rt2x00dev->csr_addr)
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goto exit;
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rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
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if (!rt2x00dev->eeprom)
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goto exit;
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rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
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if (!rt2x00dev->rf)
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goto exit;
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return 0;
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exit:
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ERROR_PROBE("Failed to allocate registers.\n");
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rt2x00pci_free_reg(rt2x00dev);
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return -ENOMEM;
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}
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int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
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{
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struct rt2x00_ops *ops = (struct rt2x00_ops *)id->driver_data;
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struct ieee80211_hw *hw;
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struct rt2x00_dev *rt2x00dev;
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int retval;
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retval = pci_request_regions(pci_dev, pci_name(pci_dev));
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if (retval) {
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ERROR_PROBE("PCI request regions failed.\n");
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return retval;
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}
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retval = pci_enable_device(pci_dev);
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if (retval) {
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ERROR_PROBE("Enable device failed.\n");
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goto exit_release_regions;
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}
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pci_set_master(pci_dev);
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if (pci_set_mwi(pci_dev))
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ERROR_PROBE("MWI not available.\n");
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if (pci_set_dma_mask(pci_dev, DMA_64BIT_MASK) &&
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pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) {
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ERROR_PROBE("PCI DMA not supported.\n");
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retval = -EIO;
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goto exit_disable_device;
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}
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hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
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if (!hw) {
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ERROR_PROBE("Failed to allocate hardware.\n");
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retval = -ENOMEM;
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goto exit_disable_device;
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}
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pci_set_drvdata(pci_dev, hw);
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rt2x00dev = hw->priv;
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rt2x00dev->dev = pci_dev;
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rt2x00dev->ops = ops;
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rt2x00dev->hw = hw;
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retval = rt2x00pci_alloc_reg(rt2x00dev);
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if (retval)
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goto exit_free_device;
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retval = rt2x00lib_probe_dev(rt2x00dev);
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if (retval)
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goto exit_free_reg;
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return 0;
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exit_free_reg:
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rt2x00pci_free_reg(rt2x00dev);
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exit_free_device:
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ieee80211_free_hw(hw);
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exit_disable_device:
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if (retval != -EBUSY)
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pci_disable_device(pci_dev);
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exit_release_regions:
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pci_release_regions(pci_dev);
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pci_set_drvdata(pci_dev, NULL);
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return retval;
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_probe);
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void rt2x00pci_remove(struct pci_dev *pci_dev)
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{
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struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
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struct rt2x00_dev *rt2x00dev = hw->priv;
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/*
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* Free all allocated data.
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*/
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rt2x00lib_remove_dev(rt2x00dev);
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rt2x00pci_free_reg(rt2x00dev);
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ieee80211_free_hw(hw);
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/*
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* Free the PCI device data.
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*/
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pci_set_drvdata(pci_dev, NULL);
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pci_disable_device(pci_dev);
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pci_release_regions(pci_dev);
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_remove);
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#ifdef CONFIG_PM
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int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
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{
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struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
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struct rt2x00_dev *rt2x00dev = hw->priv;
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int retval;
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retval = rt2x00lib_suspend(rt2x00dev, state);
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if (retval)
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return retval;
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rt2x00pci_free_reg(rt2x00dev);
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pci_save_state(pci_dev);
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pci_disable_device(pci_dev);
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return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
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}
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EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
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int rt2x00pci_resume(struct pci_dev *pci_dev)
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{
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struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
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struct rt2x00_dev *rt2x00dev = hw->priv;
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int retval;
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if (pci_set_power_state(pci_dev, PCI_D0) ||
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pci_enable_device(pci_dev) ||
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pci_restore_state(pci_dev)) {
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ERROR(rt2x00dev, "Failed to resume device.\n");
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return -EIO;
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}
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|
|
retval = rt2x00pci_alloc_reg(rt2x00dev);
|
|
if (retval)
|
|
return retval;
|
|
|
|
retval = rt2x00lib_resume(rt2x00dev);
|
|
if (retval)
|
|
goto exit_free_reg;
|
|
|
|
return 0;
|
|
|
|
exit_free_reg:
|
|
rt2x00pci_free_reg(rt2x00dev);
|
|
|
|
return retval;
|
|
}
|
|
EXPORT_SYMBOL_GPL(rt2x00pci_resume);
|
|
#endif /* CONFIG_PM */
|
|
|
|
/*
|
|
* rt2x00pci module information.
|
|
*/
|
|
MODULE_AUTHOR(DRV_PROJECT);
|
|
MODULE_VERSION(DRV_VERSION);
|
|
MODULE_DESCRIPTION("rt2x00 library");
|
|
MODULE_LICENSE("GPL");
|