d3245b28ef
Refactor PHY, MAC and NIC configuration operations so that the
existing link configuration can be re-pushed with:
efx->phy_op->reconfigure(efx);
efx->mac_op->reconfigure(efx);
and a new configuration with:
efx->nic_op->reconfigure_port(efx);
(plus locking and error-checking).
We have not held the link settings in software (aside from flow
control), and have relied on asking the hardware what they are. This
is a problem because in some cases the hardware may no longer be in a
state to tell us. In particular, if an entire multi-port board is
reset through one port, the driver bindings to other ports have no
chance to save settings before recovering.
We only actually need to keep track of the autonegotiation settings,
so add an ethtool advertising mask to struct efx_nic, initialise it
in PHY init and update it as necessary.
Remove now-unneeded uses of efx_phy_op::{get,set}_settings() and
struct ethtool_cmd.
Much of this was done by Steve Hodgson <shodgson@solarflare.com>.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
119 lines
4.6 KiB
C
119 lines
4.6 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2005-2006 Fen Systems Ltd.
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* Copyright 2006-2008 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#ifndef EFX_EFX_H
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#define EFX_EFX_H
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#include "net_driver.h"
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/* PCI IDs */
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#define EFX_VENDID_SFC 0x1924
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#define FALCON_A_P_DEVID 0x0703
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#define FALCON_A_S_DEVID 0x6703
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#define FALCON_B_P_DEVID 0x0710
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/* Solarstorm controllers use BAR 0 for I/O space and BAR 2(&3) for memory */
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#define EFX_MEM_BAR 2
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/* TX */
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extern int efx_probe_tx_queue(struct efx_tx_queue *tx_queue);
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extern void efx_remove_tx_queue(struct efx_tx_queue *tx_queue);
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extern void efx_init_tx_queue(struct efx_tx_queue *tx_queue);
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extern void efx_fini_tx_queue(struct efx_tx_queue *tx_queue);
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extern void efx_release_tx_buffers(struct efx_tx_queue *tx_queue);
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extern netdev_tx_t
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efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev);
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extern netdev_tx_t
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efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb);
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extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index);
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extern void efx_stop_queue(struct efx_nic *efx);
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extern void efx_wake_queue(struct efx_nic *efx);
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#define EFX_TXQ_SIZE 1024
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#define EFX_TXQ_MASK (EFX_TXQ_SIZE - 1)
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/* RX */
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extern int efx_probe_rx_queue(struct efx_rx_queue *rx_queue);
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extern void efx_remove_rx_queue(struct efx_rx_queue *rx_queue);
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extern void efx_init_rx_queue(struct efx_rx_queue *rx_queue);
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extern void efx_fini_rx_queue(struct efx_rx_queue *rx_queue);
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extern void efx_rx_strategy(struct efx_channel *channel);
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extern void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue);
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extern void efx_rx_work(struct work_struct *data);
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extern void __efx_rx_packet(struct efx_channel *channel,
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struct efx_rx_buffer *rx_buf, bool checksummed);
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extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
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unsigned int len, bool checksummed, bool discard);
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extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay);
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#define EFX_RXQ_SIZE 1024
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#define EFX_RXQ_MASK (EFX_RXQ_SIZE - 1)
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/* Channels */
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extern void efx_process_channel_now(struct efx_channel *channel);
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#define EFX_EVQ_SIZE 4096
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#define EFX_EVQ_MASK (EFX_EVQ_SIZE - 1)
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/* Ports */
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extern int efx_reconfigure_port(struct efx_nic *efx);
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extern int __efx_reconfigure_port(struct efx_nic *efx);
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/* Ethtool support */
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extern int efx_ethtool_get_settings(struct net_device *net_dev,
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struct ethtool_cmd *ecmd);
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extern int efx_ethtool_set_settings(struct net_device *net_dev,
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struct ethtool_cmd *ecmd);
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extern const struct ethtool_ops efx_ethtool_ops;
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/* Reset handling */
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extern void efx_reset_down(struct efx_nic *efx, enum reset_type method);
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extern int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok);
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/* Global */
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extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type);
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extern void efx_suspend(struct efx_nic *efx);
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extern void efx_resume(struct efx_nic *efx);
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extern void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs,
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int rx_usecs, bool rx_adaptive);
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extern int efx_request_power(struct efx_nic *efx, int mw, const char *name);
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extern void efx_hex_dump(const u8 *, unsigned int, const char *);
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/* Dummy PHY ops for PHY drivers */
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extern int efx_port_dummy_op_int(struct efx_nic *efx);
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extern void efx_port_dummy_op_void(struct efx_nic *efx);
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extern void
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efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode);
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extern bool efx_port_dummy_op_poll(struct efx_nic *efx);
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/* MTD */
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#ifdef CONFIG_SFC_MTD
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extern int efx_mtd_probe(struct efx_nic *efx);
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extern void efx_mtd_rename(struct efx_nic *efx);
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extern void efx_mtd_remove(struct efx_nic *efx);
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#else
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static inline int efx_mtd_probe(struct efx_nic *efx) { return 0; }
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static inline void efx_mtd_rename(struct efx_nic *efx) {}
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static inline void efx_mtd_remove(struct efx_nic *efx) {}
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#endif
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extern unsigned int efx_monitor_interval;
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static inline void efx_schedule_channel(struct efx_channel *channel)
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{
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EFX_TRACE(channel->efx, "channel %d scheduling NAPI poll on CPU%d\n",
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channel->channel, raw_smp_processor_id());
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channel->work_pending = true;
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napi_schedule(&channel->napi_str);
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}
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extern void efx_link_status_changed(struct efx_nic *efx);
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extern void efx_link_set_advertising(struct efx_nic *efx, u32);
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extern void efx_link_set_wanted_fc(struct efx_nic *efx, enum efx_fc_type);
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#endif /* EFX_EFX_H */
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