235 lines
6.2 KiB
C
235 lines
6.2 KiB
C
/*
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* Copyright (C) 2003 PMC-Sierra Inc.
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* Author: Manish Lachwani (lachwani@pmc-sierra.com)
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*
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* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/bcd.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/bootmem.h>
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#include <linux/swap.h>
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#include <linux/ioport.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/timex.h>
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#include <linux/termios.h>
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#include <linux/tty.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <asm/time.h>
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#include <asm/bootinfo.h>
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#include <asm/page.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/processor.h>
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#include <asm/reboot.h>
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#include <asm/serial.h>
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#include <asm/titan_dep.h>
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#include <asm/m48t37.h>
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#include "setup.h"
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unsigned char titan_ge_mac_addr_base[6] = {
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// 0x00, 0x03, 0xcc, 0x1d, 0x22, 0x00
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0x00, 0xe0, 0x04, 0x00, 0x00, 0x21
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};
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unsigned long cpu_clock;
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unsigned long yosemite_base;
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static struct m48t37_rtc *m48t37_base;
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void __init bus_error_init(void)
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{
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/* Do nothing */
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}
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unsigned long m48t37y_get_time(void)
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{
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unsigned int year, month, day, hour, min, sec;
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unsigned long flags;
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spin_lock_irqsave(&rtc_lock, flags);
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/* Stop the update to the time */
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m48t37_base->control = 0x40;
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year = BCD2BIN(m48t37_base->year);
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year += BCD2BIN(m48t37_base->century) * 100;
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month = BCD2BIN(m48t37_base->month);
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day = BCD2BIN(m48t37_base->date);
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hour = BCD2BIN(m48t37_base->hour);
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min = BCD2BIN(m48t37_base->min);
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sec = BCD2BIN(m48t37_base->sec);
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/* Start the update to the time again */
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m48t37_base->control = 0x00;
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spin_unlock_irqrestore(&rtc_lock, flags);
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return mktime(year, month, day, hour, min, sec);
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}
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int m48t37y_set_time(unsigned long sec)
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{
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struct rtc_time tm;
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unsigned long flags;
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/* convert to a more useful format -- note months count from 0 */
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to_tm(sec, &tm);
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tm.tm_mon += 1;
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spin_lock_irqsave(&rtc_lock, flags);
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/* enable writing */
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m48t37_base->control = 0x80;
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/* year */
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m48t37_base->year = BIN2BCD(tm.tm_year % 100);
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m48t37_base->century = BIN2BCD(tm.tm_year / 100);
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/* month */
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m48t37_base->month = BIN2BCD(tm.tm_mon);
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/* day */
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m48t37_base->date = BIN2BCD(tm.tm_mday);
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/* hour/min/sec */
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m48t37_base->hour = BIN2BCD(tm.tm_hour);
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m48t37_base->min = BIN2BCD(tm.tm_min);
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m48t37_base->sec = BIN2BCD(tm.tm_sec);
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/* day of week -- not really used, but let's keep it up-to-date */
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m48t37_base->day = BIN2BCD(tm.tm_wday + 1);
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/* disable writing */
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m48t37_base->control = 0x00;
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spin_unlock_irqrestore(&rtc_lock, flags);
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return 0;
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}
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void __init plat_timer_setup(struct irqaction *irq)
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{
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setup_irq(7, irq);
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}
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void yosemite_time_init(void)
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{
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mips_hpt_frequency = cpu_clock / 2;
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mips_hpt_frequency = 33000000 * 3 * 5;
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}
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/* No other usable initialization hook than this ... */
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extern void (*late_time_init)(void);
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unsigned long ocd_base;
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EXPORT_SYMBOL(ocd_base);
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/*
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* Common setup before any secondaries are started
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*/
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#define TITAN_UART_CLK 3686400
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#define TITAN_SERIAL_BASE_BAUD (TITAN_UART_CLK / 16)
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#define TITAN_SERIAL_IRQ 4
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#define TITAN_SERIAL_BASE 0xfd000008UL
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static void __init py_map_ocd(void)
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{
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ocd_base = (unsigned long) ioremap(OCD_BASE, OCD_SIZE);
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if (!ocd_base)
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panic("Mapping OCD failed - game over. Your score is 0.");
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/* Kludge for PMON bug ... */
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OCD_WRITE(0x0710, 0x0ffff029);
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}
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static void __init py_uart_setup(void)
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{
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struct uart_port up;
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/*
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* Register to interrupt zero because we share the interrupt with
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* the serial driver which we don't properly support yet.
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*/
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memset(&up, 0, sizeof(up));
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up.membase = (unsigned char *) ioremap(TITAN_SERIAL_BASE, 8);
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up.irq = TITAN_SERIAL_IRQ;
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up.uartclk = TITAN_UART_CLK;
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up.regshift = 0;
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up.iotype = UPIO_MEM;
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up.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
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up.line = 0;
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if (early_serial_setup(&up))
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printk(KERN_ERR "Early serial init of port 0 failed\n");
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}
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static void __init py_rtc_setup(void)
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{
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m48t37_base = ioremap(YOSEMITE_RTC_BASE, YOSEMITE_RTC_SIZE);
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if (!m48t37_base)
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printk(KERN_ERR "Mapping the RTC failed\n");
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rtc_mips_get_time = m48t37y_get_time;
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rtc_mips_set_time = m48t37y_set_time;
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write_seqlock(&xtime_lock);
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xtime.tv_sec = m48t37y_get_time();
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xtime.tv_nsec = 0;
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set_normalized_timespec(&wall_to_monotonic,
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-xtime.tv_sec, -xtime.tv_nsec);
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write_sequnlock(&xtime_lock);
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}
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/* Not only time init but that's what the hook it's called through is named */
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static void __init py_late_time_init(void)
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{
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py_map_ocd();
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py_uart_setup();
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py_rtc_setup();
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}
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void __init plat_mem_setup(void)
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{
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board_time_init = yosemite_time_init;
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late_time_init = py_late_time_init;
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/* Add memory regions */
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add_memory_region(0x00000000, 0x10000000, BOOT_MEM_RAM);
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#if 0 /* XXX Crash ... */
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OCD_WRITE(RM9000x2_OCD_HTSC,
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OCD_READ(RM9000x2_OCD_HTSC) | HYPERTRANSPORT_ENABLE);
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/* Set the BAR. Shifted mode */
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OCD_WRITE(RM9000x2_OCD_HTBAR0, HYPERTRANSPORT_BAR0_ADDR);
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OCD_WRITE(RM9000x2_OCD_HTMASK0, HYPERTRANSPORT_SIZE0);
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#endif
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}
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